Merge pull request #115 from antonblanchard/reduce-wishbone

[microwatt.git] / Makefile

diff --git a/Makefile b/Makefile
index 13d245ebe706a7bead70ed4ad477a3d0193db6de..3056c53b4f9b27ceffd570c2ca7fee3b2c083e46 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2,7 +2,8 @@ GHDL=ghdl
 GHDLFLAGS=--std=08 -Psim-unisim
 CFLAGS=-O2 -Wall
 
-all = core_tb simple_ram_behavioural_tb soc_reset_tb icache_tb multiply_tb dmi_dtm_tb divider_tb
+all = core_tb simple_ram_behavioural_tb soc_reset_tb icache_tb dcache_tb multiply_tb dmi_dtm_tb divider_tb \
+       rotator_tb countzero_tb
 
 # XXX
 # loadstore_tb fetch_tb
@@ -13,33 +14,42 @@ all: $(all)
        $(GHDL) -a $(GHDLFLAGS) $<
 
 common.o: decode_types.o
+control.o: gpr_hazard.o cr_hazard.o
 sim_jtag.o: sim_jtag_socket.o
 core_tb.o: common.o wishbone_types.o core.o soc.o sim_jtag.o
-core.o: common.o wishbone_types.o fetch1.o fetch2.o icache.o decode1.o decode2.o register_file.o cr_file.o execute1.o execute2.o loadstore1.o loadstore2.o multiply.o writeback.o core_debug.o divider.o
+core.o: common.o wishbone_types.o fetch1.o fetch2.o icache.o decode1.o decode2.o register_file.o cr_file.o execute1.o loadstore1.o dcache.o multiply.o writeback.o core_debug.o divider.o
 core_debug.o: common.o
+countzero.o:
+countzero_tb.o: common.o glibc_random.o countzero.o
 cr_file.o: common.o
 crhelpers.o: common.o
 decode1.o: common.o decode_types.o
-decode2.o: decode_types.o common.o helpers.o insn_helpers.o
+decode2.o: decode_types.o common.o helpers.o insn_helpers.o control.o
 decode_types.o:
-execute1.o: decode_types.o common.o helpers.o crhelpers.o ppc_fx_insns.o
-execute2.o: common.o crhelpers.o ppc_fx_insns.o
+execute1.o: decode_types.o common.o helpers.o crhelpers.o insn_helpers.o ppc_fx_insns.o rotator.o logical.o countzero.o
 fetch1.o: common.o
 fetch2.o: common.o wishbone_types.o
 glibc_random_helpers.o:
 glibc_random.o: glibc_random_helpers.o
 helpers.o:
-icache.o: common.o wishbone_types.o
+cache_ram.o:
+plru.o:
+plru_tb.o: plru.o
+icache.o: common.o wishbone_types.o plru.o cache_ram.o
 icache_tb.o: common.o wishbone_types.o icache.o simple_ram_behavioural.o
+dcache.o: common.o wishbone_types.o plru.o cache_ram.o
+dcache_tb.o: common.o wishbone_types.o dcache.o simple_ram_behavioural.o
 insn_helpers.o:
 loadstore1.o: common.o helpers.o
-loadstore2.o: common.o helpers.o wishbone_types.o
+logical.o: decode_types.o
 multiply_tb.o: decode_types.o common.o glibc_random.o ppc_fx_insns.o multiply.o
-multiply.o: common.o decode_types.o ppc_fx_insns.o crhelpers.o
+multiply.o: common.o decode_types.o
 divider_tb.o: decode_types.o common.o glibc_random.o ppc_fx_insns.o divider.o
-divider.o: common.o decode_types.o crhelpers.o
+divider.o: common.o decode_types.o
 ppc_fx_insns.o: helpers.o
 register_file.o: common.o
+rotator.o: common.o
+rotator_tb.o: common.o glibc_random.o ppc_fx_insns.o insn_helpers.o rotator.o
 sim_console.o:
 simple_ram_behavioural_helpers.o:
 simple_ram_behavioural_tb.o: wishbone_types.o simple_ram_behavioural.o
@@ -48,7 +58,7 @@ sim_uart.o: wishbone_types.o sim_console.o
 soc.o: common.o wishbone_types.o core.o wishbone_arbiter.o sim_uart.o simple_ram_behavioural.o dmi_dtm_xilinx.o wishbone_debug_master.o
 wishbone_arbiter.o: wishbone_types.o
 wishbone_types.o:
-writeback.o: common.o
+writeback.o: common.o crhelpers.o
 dmi_dtm_tb.o: dmi_dtm_xilinx.o wishbone_debug_master.o
 dmi_dtm_xilinx.o: wishbone_types.o sim-unisim/unisim_vcomponents.o
 wishbone_debug_master.o: wishbone_types.o
@@ -72,6 +82,12 @@ fetch_tb: fetch_tb.o
 icache_tb: icache_tb.o
        $(GHDL) -e $(GHDLFLAGS) -Wl,simple_ram_behavioural_helpers_c.o $@
 
+dcache_tb: dcache_tb.o
+       $(GHDL) -e $(GHDLFLAGS) -Wl,simple_ram_behavioural_helpers_c.o $@
+
+plru_tb: plru_tb.o
+       $(GHDL) -e $(GHDLFLAGS) $@
+
 loadstore_tb: loadstore_tb.o
        $(GHDL) -e $(GHDLFLAGS) $@
 
@@ -81,6 +97,12 @@ multiply_tb: multiply_tb.o
 divider_tb: divider_tb.o
        $(GHDL) -e $(GHDLFLAGS) $@
 
+rotator_tb: rotator_tb.o
+       $(GHDL) -e $(GHDLFLAGS) $@
+
+countzero_tb: countzero_tb.o
+       $(GHDL) -e $(GHDLFLAGS) $@
+
 simple_ram_tb: simple_ram_tb.o
        $(GHDL) -e $(GHDLFLAGS) $@