Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-position

[yosys.git] / Makefile

diff --git a/Makefile b/Makefile
index 6c5a436c1c75ef228f208d186fc8680ee5c108e6..d33f27b639024d614adf9e9327427df1c2c410e4 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -666,6 +666,12 @@ else
 SEEDOPT=""
 endif
 
+ifneq ($(ABCEXTERNAL),)
+ABCOPT="-A $(ABCEXTERNAL)"
+else
+ABCOPT=""
+endif
+
 test: $(TARGETS) $(EXTRA_TARGETS)
        +cd tests/simple && bash run-test.sh $(SEEDOPT)
        +cd tests/hana && bash run-test.sh $(SEEDOPT)
@@ -674,13 +680,13 @@ test: $(TARGETS) $(EXTRA_TARGETS)
        +cd tests/share && bash run-test.sh $(SEEDOPT)
        +cd tests/fsm && bash run-test.sh $(SEEDOPT)
        +cd tests/techmap && bash run-test.sh
-       +cd tests/memories && bash run-test.sh $(SEEDOPT)
+       +cd tests/memories && bash run-test.sh $(ABCOPT) $(SEEDOPT)
        +cd tests/bram && bash run-test.sh $(SEEDOPT)
        +cd tests/various && bash run-test.sh
        +cd tests/sat && bash run-test.sh
        +cd tests/svinterfaces && bash run-test.sh $(SEEDOPT)
        +cd tests/opt && bash run-test.sh
-       +cd tests/aiger && bash run-test.sh
+       +cd tests/aiger && bash run-test.sh $(ABCOPT)
        +cd tests/arch && bash run-test.sh
        +cd tests/simple_abc9 && bash run-test.sh $(SEEDOPT)
        @echo ""