Connect dramcore to SoC bus in ECPIX-5 example

[gram.git] / README.md

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-# Gram
+# gram
 
-Gram is an nMigen+LambdaSoC port of the [LiteDRAM]() core by [enjoy-digital](). It currently only targets ECP5+DDR3.
+gram is an nMigen+LambdaSoC port of the [LiteDRAM]() core by [enjoy-digital](). It currently only targets ECP5+DDR3.
 
 ## License
 
+2-clause BSD.