ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.

[gem5.git] / SConstruct

diff --git a/SConstruct b/SConstruct
index f143bca0e73f4535b1f2cb668ed983901fd1a2e8..d210fc5b97289d546d2fe076fec38795d57f4725 100644 (file)
--- a/SConstruct
+++ b/SConstruct
@@ -314,7 +314,6 @@ global_sticky_vars.AddVariables(
     ('BATCH_CMD', 'Batch pool submission command name', 'qdo'),
     ('EXTRAS', 'Add Extra directories to the compilation', '',
      PathListAllExist, PathListMakeAbsolute),
-    BoolVariable('RUBY', 'Build with Ruby', False),
     )
 
 # base help text
@@ -324,11 +323,11 @@ Usage: scons [scons options] [build options] [target(s)]
 Global sticky options:
 '''
 
-help_text += global_sticky_vars.GenerateHelpText(main)
-
 # Update main environment with values from ARGUMENTS & global_sticky_vars_file
 global_sticky_vars.Update(main)
 
+help_text += global_sticky_vars.GenerateHelpText(main)
+
 # Save sticky variable settings back to current variables file
 global_sticky_vars.Save(global_sticky_vars_file, main)
 
@@ -516,7 +515,8 @@ from distutils import sysconfig
 
 py_getvar = sysconfig.get_config_var
 
-py_version = 'python' + py_getvar('VERSION')
+py_debug = getattr(sys, 'pydebug', False)
+py_version = 'python' + py_getvar('VERSION') + (py_debug and "_d" or "")
 
 py_general_include = sysconfig.get_python_inc()
 py_platform_include = sysconfig.get_python_inc(plat_specific=True)
@@ -612,10 +612,34 @@ main = conf.Finish()
 all_isa_list = [ ]
 Export('all_isa_list')
 
-# Define the universe of supported CPU models
-all_cpu_list = [ ]
-default_cpus = [ ]
-Export('all_cpu_list', 'default_cpus')
+class CpuModel(object):
+    '''The CpuModel class encapsulates everything the ISA parser needs to
+    know about a particular CPU model.'''
+
+    # Dict of available CPU model objects.  Accessible as CpuModel.dict.
+    dict = {}
+    list = []
+    defaults = []
+
+    # Constructor.  Automatically adds models to CpuModel.dict.
+    def __init__(self, name, filename, includes, strings, default=False):
+        self.name = name           # name of model
+        self.filename = filename   # filename for output exec code
+        self.includes = includes   # include files needed in exec file
+        # The 'strings' dict holds all the per-CPU symbols we can
+        # substitute into templates etc.
+        self.strings = strings
+
+        # This cpu is enabled by default
+        self.default = default
+
+        # Add self to dict
+        if name in CpuModel.dict:
+            raise AttributeError, "CpuModel '%s' already registered" % name
+        CpuModel.dict[name] = self
+        CpuModel.list.append(name)
+
+Export('CpuModel')
 
 # Sticky variables get saved in the variables file so they persist from
 # one invocation to the next (unless overridden, in which case the new
@@ -640,13 +664,13 @@ for bdir in [ base_dir ] + extras_dir_list:
             SConscript(joinpath(root, 'SConsopts'))
 
 all_isa_list.sort()
-all_cpu_list.sort()
-default_cpus.sort()
 
 sticky_vars.AddVariables(
     EnumVariable('TARGET_ISA', 'Target ISA', 'alpha', all_isa_list),
     BoolVariable('FULL_SYSTEM', 'Full-system support', False),
-    ListVariable('CPU_MODELS', 'CPU models', default_cpus, all_cpu_list),
+    ListVariable('CPU_MODELS', 'CPU models',
+                 sorted(n for n,m in CpuModel.dict.iteritems() if m.default),
+                 sorted(CpuModel.list)),
     BoolVariable('NO_FAST_ALLOC', 'Disable fast object allocator', False),
     BoolVariable('FAST_ALLOC_DEBUG', 'Enable fast object allocator debugging',
                  False),
@@ -664,6 +688,7 @@ sticky_vars.AddVariables(
     BoolVariable('USE_FENV', 'Use <fenv.h> IEEE mode control', have_fenv),
     BoolVariable('USE_CHECKER', 'Use checker for detailed CPU models', False),
     BoolVariable('CP_ANNOTATE', 'Enable critical path annotation capability', False),
+    BoolVariable('RUBY', 'Build with Ruby', False),
     )
 
 nonsticky_vars.AddVariables(
@@ -742,17 +767,10 @@ def make_switching_dir(dname, switch_headers, env):
     # list of ISAs from env['ALL_ISA_LIST'].
     def gen_switch_hdr(target, source, env):
         fname = str(target[0])
-        bname = basename(fname)
         f = open(fname, 'w')
-        f.write('#include "arch/isa_specific.hh"\n')
-        cond = '#if'
-        for isa in all_isa_list:
-            f.write('%s THE_ISA == %s_ISA\n#include "%s/%s/%s"\n'
-                    % (cond, isa.upper(), dname, isa, bname))
-            cond = '#elif'
-        f.write('#else\n#error "THE_ISA not set"\n#endif\n')
+        isa = env['TARGET_ISA'].lower()
+        print >>f, '#include "%s/%s/%s"' % (dname, isa, basename(fname))
         f.close()
-        return 0
 
     # String to print when generating header
     def gen_switch_hdr_string(target, source, env):