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[libreriscv.git] / The_Mission.mdwn

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-## The Mission
+# The Mission
 
  - give mass volume appliance manufacturers an alternative to expensive un-auditable chips.
  - maximize the degree of trust a customer can place in their processor. 
 
-## The Means:
+# The Means:
 
-provide the customer the **freedom to study, modify, and redistribute** the full SoC source from HDL and boot loader to down to the VLSI.
+- provide the customer the **freedom to study, modify, and redistribute** the full SoC source from HDL and boot loader to down to the VLSI.
+- engage in **full transparency** at every level of the development, right from the inception through to delivery of silicon.  no exceptions.
 
-## The Market:
+# The Market:
 
  - chromebooks
  - smartphones
  - tablets
  - industrial boards
  - single-board computers (like the Raspberry Pi)
+ - wearables
+ - CV capable flight controller for lightweight drones
  - whatever you want
 
-## The Machine:
+# The Machine:
 
-a (quad core, 800mhz, dual issue, 4-wide FP32, CPU, GPU, VPU, [and later an ML inference core] ) SOC.
+- our first target (Oct 2020): a single-core dual-issue 180nm 64-bit "demo" QFP chip that will also be a saleable product in the "Embedded" space (Arduino, STM32F, Ingenic jz4720).
+- a full quad core SoC: 800mhz, dual issue, 4-wide FP32, Hybrid CPU / GPU / VPU [and later an ML inference core], comparable to the Allwinner 64 in capability.