* Digital circuit design
* Availability: Outside normal working hours.
-## [[Cole Poirier|cole]]
-
-* Trying to learn and organize stuff
-* GitHub: [[https://github.com/colepoirier]]
-* Availability: full-time
-
## [[Sanjay A Menon|Sanjay]]
* Skills: Verilog, C/C++, Python, TCL & PERL
### [[oa/madan]]
-* Experience: Programming in Python and Knowledge of ML algorithms and NLP
+* Interests: Programming in Python and Knowledge of ML algorithms and NLP
* Availability: 5 hours per week
* Statistician
### [[oa/adithya]]
-TODO, Adithya
+* Interests:Digital System Design,PCB layout, Programming, Machine Learning, IoT
+* Programming Languages: Verilog, C, C++, Java, Python3, Julia
+* Availability: ~10hrs per week
### [[oa/Niranjan]]
* Programming Languages: C, Python, Java, VHDL
* Availability: ~8-10 hours/week
-### [[oa/Sree Rekha K P]]
-
-* Interests: Embedded systems, Digital Electronics
-* Programming Languages: Verilog, 8051 Microcontroller, C
-* Availability: ~ 3-5 hours/week
-
-### [[oa/Akshara S]]
-
-* Interests: Embedded systems, Analog Electronics
-* Programming Languages: C, Python, Verilog
-* Availability: ~ 3-4 hours/week
-
### [[oa/Sukhanshu D]]
* Experience: SOC Verification Intern, Digital Design
* Programming Languages: Python, Verilog, Ng-spice
* Availability: 4-6 hours per week
+### [[oa/Mehul N]]
-### [[oa/sparsha]]
-
-TODO
+* Interests: Digital Design, Verification, IC Fabrication
+* Programming Languages: Verilog, System Verilog, UVM
+* Availability: ~ 6-8 hours/week
+* Experience: SoC Verification Intern, Research Intern at KIS
## 3mdeb
* Languages: C, C++, Python
* FW experience: system programming
* Availability: depends on a week (0..10+hrs/week)
+
+## [[Kyle Lehman|klehman]]
+
+* Languages: C/C++, Java, Python, SQL, assembly
+* Interests: Language design, microacrhitecture, OS design, emulation, 3D computation
+* Other interests: Nearly anything that floats, flies, or has an engine with wheels
+
+## [[Andrey Miroshnikov|andreym]]
+* Languages: C, Python, Verilog
+* Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design
+* Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
+* Other interests: Lingua Latina, Philosophy, History
+* Availability: Full-time
+* IRC: octavius
+
+## [[Manikandan Nagarajan|Manik]]
+
+* Languages: Verilog HDL, VHDL, C, Python & TCL
+* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design.
+* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
+* Availability: 8~10hrs/week
+
+## Former Members
+
+### [[Cole Poirier|cole]]