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[libreriscv.git] / about_us.mdwn
index b2ac1344aa70675e728bbe010de9145efc1b3797..3c8345dffa2d203b4ecfd4488332900c276c4e89 100644 (file)
@@ -203,8 +203,23 @@ Alain's website: <http://phcomp.co.uk>
 * FW experience: system programming
 * Availability: depends on a week (0..10+hrs/week)
 
-## [[Kyle Lehman]]
+## [[Kyle Lehman|klehman]]
 
 * Languages: C/C++, Java, Python, SQL, assembly
 * Interests: Language design, microacrhitecture, OS design, emulation, 3D computation 
 * Other interests: Nearly anything that floats, flies, or has an engine with wheels
+
+## [[Andrey Miroshnikov|andreym]]
+* Languages: C, Python, Verilog
+* Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design
+* Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
+* Other interests: Lingua Latina, Philosophy, History
+* Availability: Full-time
+* IRC: octavius
+
+## [[Manikandan Nagarajan|Manik]]
+
+* Languages: Verilog HDL, VHDL, C, Python & TCL
+* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
+* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
+* Availability: 8~10hrs/week