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[libreriscv.git] / about_us.mdwn

diff --git a/about_us.mdwn b/about_us.mdwn
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@@ -137,17 +137,6 @@ Alain's website: <http://phcomp.co.uk>
 * Availability:  10+hrs/week, more is negotiable
 * Timezone:  UTC-07:00 (DST UTC-06:00, 2nd Sun of Mar-1st Sun of Nov)
 
-## [[Mikolaj Wielgus|mikolajw]]
-
-* Interests: Libre software and hardware, analog circuits, RF and microwave circuits, nonlinear systems, oscillators
-* Hardware Experience: PCB schematic and layout design, very small amount of IC design
-* Software Experience: Data acquisition and processing (LXI, SCPI), GUI development (wxWidgets), Microcontroller programming (AVR, STM32), video game development (Love2D, SDL)
-* Languages: Verilog, Asm (AVR), C, C++, C#, D, Python, Octave, Lua, Java, or any other language involving a similar set of abstractions
-* GitLab: https://gitlab.com/mwielgus
-* Most of my skills are self-taught by making small amateur projects. I have only little industry experience.
-* Availability: ~6 hrs/week
-* Timezone: UTC+01:00
-
 ## Object Automation
 
 ### [[oa/madan]]
@@ -215,10 +204,11 @@ Alain's website: <http://phcomp.co.uk>
 * Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
 * Other interests: Lingua Latina, Philosophy, History
 * Availability: Full-time
+* IRC: octavius
 
 ## [[Manikandan Nagarajan|Manik]]
 
-* Languages: Verilog HDL, C, Python & TCL
+* Languages: Verilog HDL, VHDL, C, Python & TCL
 * Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
 * LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
 * Availability: 8~10hrs/week