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[gem5.git] / arch / alpha / ev5.cc

diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 8494ee9f65aeddcad5d35fdff363f1c0d182f3a5..aaa81a58d8e110467ac537ec9c6ffc4faf31fd93 100644 (file)
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -240,7 +240,9 @@ ExecContext::readIpr(int idx, Fault &fault)
       case AlphaISA::IPR_VA:
         // SFX: unlocks interrupt status registers
         retval = ipr[idx];
-        regs.intrlock = false;
+
+        if (!misspeculating())
+            regs.intrlock = false;
         break;
 
       case AlphaISA::IPR_VA_FORM:
@@ -253,7 +255,7 @@ ExecContext::readIpr(int idx, Fault &fault)
 
       case AlphaISA::IPR_DTB_PTE:
         {
-            AlphaISA::PTE &pte = dtb->index();
+            AlphaISA::PTE &pte = dtb->index(!misspeculating());
 
             retval |= ((u_int64_t)pte.ppn & ULL(0x7ffffff)) << 32;
             retval |= ((u_int64_t)pte.xre & ULL(0xf)) << 8;