Merge ktlim@zizzer:/bk/m5

[gem5.git] / arch / alpha / faults.cc

diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc
index bde7b3db1ca88e386e15ceff2cd7bb34ce9554c8..0083aa9f36106e51f3ce100008de25d0b8f29a74 100644 (file)
--- a/arch/alpha/faults.cc
+++ b/arch/alpha/faults.cc
@@ -30,125 +30,147 @@
 #include "cpu/exec_context.hh"
 #include "cpu/base.hh"
 #include "base/trace.hh"
-#include "kern/kernel_stats.hh"
+#if FULL_SYSTEM
+#include "arch/alpha/ev5.hh"
+#endif
 
 namespace AlphaISA
 {
 
-FaultVect AlphaMachineCheckFault::_vect = 0x0401;
-FaultStat AlphaMachineCheckFault::_stat;
+FaultName MachineCheckFault::_name = "mchk";
+FaultVect MachineCheckFault::_vect = 0x0401;
+FaultStat MachineCheckFault::_count;
 
-FaultVect AlphaAlignmentFault::_vect = 0x0301;
-FaultStat AlphaAlignmentFault::_stat;
+FaultName AlignmentFault::_name = "unalign";
+FaultVect AlignmentFault::_vect = 0x0301;
+FaultStat AlignmentFault::_count;
 
 FaultName ResetFault::_name = "reset";
 FaultVect ResetFault::_vect = 0x0001;
-FaultStat ResetFault::_stat;
+FaultStat ResetFault::_count;
 
 FaultName ArithmeticFault::_name = "arith";
 FaultVect ArithmeticFault::_vect = 0x0501;
-FaultStat ArithmeticFault::_stat;
+FaultStat ArithmeticFault::_count;
 
 FaultName InterruptFault::_name = "interrupt";
 FaultVect InterruptFault::_vect = 0x0101;
-FaultStat InterruptFault::_stat;
+FaultStat InterruptFault::_count;
 
 FaultName NDtbMissFault::_name = "dtb_miss_single";
 FaultVect NDtbMissFault::_vect = 0x0201;
-FaultStat NDtbMissFault::_stat;
+FaultStat NDtbMissFault::_count;
 
 FaultName PDtbMissFault::_name = "dtb_miss_double";
 FaultVect PDtbMissFault::_vect = 0x0281;
-FaultStat PDtbMissFault::_stat;
+FaultStat PDtbMissFault::_count;
 
 FaultName DtbPageFault::_name = "dfault";
 FaultVect DtbPageFault::_vect = 0x0381;
-FaultStat DtbPageFault::_stat;
+FaultStat DtbPageFault::_count;
 
 FaultName DtbAcvFault::_name = "dfault";
 FaultVect DtbAcvFault::_vect = 0x0381;
-FaultStat DtbAcvFault::_stat;
+FaultStat DtbAcvFault::_count;
+
+FaultName DtbAlignmentFault::_name = "unalign";
+FaultVect DtbAlignmentFault::_vect = 0x0301;
+FaultStat DtbAlignmentFault::_count;
 
 FaultName ItbMissFault::_name = "itbmiss";
 FaultVect ItbMissFault::_vect = 0x0181;
-FaultStat ItbMissFault::_stat;
+FaultStat ItbMissFault::_count;
 
 FaultName ItbPageFault::_name = "itbmiss";
 FaultVect ItbPageFault::_vect = 0x0181;
-FaultStat ItbPageFault::_stat;
+FaultStat ItbPageFault::_count;
 
 FaultName ItbAcvFault::_name = "iaccvio";
 FaultVect ItbAcvFault::_vect = 0x0081;
-FaultStat ItbAcvFault::_stat;
+FaultStat ItbAcvFault::_count;
 
 FaultName UnimplementedOpcodeFault::_name = "opdec";
 FaultVect UnimplementedOpcodeFault::_vect = 0x0481;
-FaultStat UnimplementedOpcodeFault::_stat;
+FaultStat UnimplementedOpcodeFault::_count;
 
 FaultName FloatEnableFault::_name = "fen";
 FaultVect FloatEnableFault::_vect = 0x0581;
-FaultStat FloatEnableFault::_stat;
+FaultStat FloatEnableFault::_count;
 
 FaultName PalFault::_name = "pal";
 FaultVect PalFault::_vect = 0x2001;
-FaultStat PalFault::_stat;
+FaultStat PalFault::_count;
 
 FaultName IntegerOverflowFault::_name = "intover";
 FaultVect IntegerOverflowFault::_vect = 0x0501;
-FaultStat IntegerOverflowFault::_stat;
+FaultStat IntegerOverflowFault::_count;
 
 #if FULL_SYSTEM
 
 void AlphaFault::invoke(ExecContext * xc)
 {
-    DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc);
-    xc->cpu->recordEvent(csprintf("Fault %s", name()));
-
-    assert(!xc->misspeculating());
-    xc->kernelStats->fault(this);
-
-    if (isA<ArithmeticFault>())
-        panic("Arithmetic traps are unimplemented!");
+    FaultBase::invoke(xc);
+    countStat()++;
 
     // exception restart address
-    if (!isA<InterruptFault>() || !xc->inPalMode())
-        xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc);
+    if (setRestartAddress() || !xc->inPalMode())
+        xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->readPC());
 
-    if (isA<PalFault>() || isA<ArithmeticFault>()) {
+    if (skipFaultingInstruction()) {
         // traps...  skip faulting instruction.
         xc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
                    xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
     }
 
-    if (!xc->inPalMode())
-        AlphaISA::swap_palshadow(&(xc->regs), true);
+    xc->setPC(xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect());
+    xc->setNextPC(xc->readPC() + sizeof(MachInst));
+}
+
+void ArithmeticFault::invoke(ExecContext * xc)
+{
+    FaultBase::invoke(xc);
+    panic("Arithmetic traps are unimplemented!");
+}
+
+void DtbFault::invoke(ExecContext * xc)
+{
+    // Set fault address and flags.  Even though we're modeling an
+    // EV5, we use the EV6 technique of not latching fault registers
+    // on VPTE loads (instead of locking the registers until IPR_VA is
+    // read, like the EV5).  The EV6 approach is cleaner and seems to
+    // work with EV5 PAL code, but not the other way around.
+    if (!xc->misspeculating()
+        && !(reqFlags & VPTE) && !(reqFlags & NO_FAULT)) {
+        // set VA register with faulting address
+        xc->setMiscReg(AlphaISA::IPR_VA, vaddr);
+
+        // set MM_STAT register flags
+        xc->setMiscReg(AlphaISA::IPR_MM_STAT,
+            (((EV5::Opcode(xc->getInst()) & 0x3f) << 11)
+             | ((EV5::Ra(xc->getInst()) & 0x1f) << 6)
+             | (flags & 0x3f)));
+
+        // set VA_FORM register with faulting formatted address
+        xc->setMiscReg(AlphaISA::IPR_VA_FORM,
+            xc->readMiscReg(AlphaISA::IPR_MVPTBR) | (vaddr.vpn() << 3));
+    }
+
+    AlphaFault::invoke(xc);
+}
+
+void ItbFault::invoke(ExecContext * xc)
+{
+    if (!xc->misspeculating()) {
+        xc->setMiscReg(AlphaISA::IPR_ITB_TAG, pc);
+        xc->setMiscReg(AlphaISA::IPR_IFAULT_VA_FORM,
+                       xc->readMiscReg(AlphaISA::IPR_IVPTBR) |
+                       (AlphaISA::VAddr(pc).vpn() << 3));
+    }
 
-    xc->regs.pc = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect();
-    xc->regs.npc = xc->regs.pc + sizeof(MachInst);
+    AlphaFault::invoke(xc);
 }
 
 #endif
 
 } // namespace AlphaISA
 
-/*Fault * ListOfFaults[] = {
-        (Fault *)&NoFault,
-        (Fault *)&ResetFault,
-        (Fault *)&MachineCheckFault,
-        (Fault *)&ArithmeticFault,
-        (Fault *)&InterruptFault,
-        (Fault *)&NDtbMissFault,
-        (Fault *)&PDtbMissFault,
-        (Fault *)&AlignmentFault,
-        (Fault *)&DtbPageFault,
-        (Fault *)&DtbAcvFault,
-        (Fault *)&ItbMissFault,
-        (Fault *)&ItbPageFault,
-        (Fault *)&ItbAcvFault,
-        (Fault *)&UnimplementedOpcodeFault,
-        (Fault *)&FloatEnableFault,
-        (Fault *)&PalFault,
-        (Fault *)&IntegerOverflowFault,
-        };
-
-int NumFaults = sizeof(ListOfFaults) / sizeof(Fault *);*/