Changes to support automatic renaming of the shadow registers at decode time. This...

[gem5.git] / arch / alpha / faults.cc

diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc
index bbddadabf29ab79a13878b716da3867e2ab46161..78613761d127f2522640359c49565e9e150f5fd7 100644 (file)
--- a/arch/alpha/faults.cc
+++ b/arch/alpha/faults.cc
@@ -27,10 +27,16 @@
  */
 
 #include "arch/alpha/faults.hh"
+#include "cpu/exec_context.hh"
 
-FaultName AlphaFault::_name = "alphafault";
-FaultVect AlphaFault::_vect = 0x0000;
-FaultStat AlphaFault::_stat;
+namespace AlphaISA
+{
+
+FaultVect AlphaMachineCheckFault::_vect = 0x0401;
+FaultStat AlphaMachineCheckFault::_stat;
+
+FaultVect AlphaAlignmentFault::_vect = 0x0301;
+FaultStat AlphaAlignmentFault::_stat;
 
 FaultName ResetFault::_name = "reset";
 FaultVect ResetFault::_vect = 0x0001;
@@ -88,6 +94,27 @@ FaultName IntegerOverflowFault::_name = "intover";
 FaultVect IntegerOverflowFault::_vect = 0x0501;
 FaultStat IntegerOverflowFault::_stat;
 
+#if FULL_SYSTEM
+
+void AlphaFault::ev5_trap(ExecContext * xc)
+{
+    xc->ev5_temp_trap(this);
+}
+
+void AlphaMachineCheckFault::ev5_trap(ExecContext * xc)
+{
+    xc->ev5_temp_trap(this);
+}
+
+void AlphaAlignmentFault::ev5_trap(ExecContext * xc)
+{
+    xc->ev5_temp_trap(this);
+}
+
+#endif
+
+} // namespace AlphaISA
+
 /*Fault * ListOfFaults[] = {
         (Fault *)&NoFault,
         (Fault *)&ResetFault,