* bfd.c (bfd_error_type, bfd_errmsgs): Add bfd_error_missing_dso.

[binutils-gdb.git] / bfd / elf32-rl78.c

diff --git a/bfd/elf32-rl78.c b/bfd/elf32-rl78.c
index f116839927473a180a920ab83105dcc7fce7c2a9..11d1ecc74571020d06573b4c3c1ab04430ce6247 100644 (file)
--- a/bfd/elf32-rl78.c
+++ b/bfd/elf32-rl78.c
@@ -778,6 +778,8 @@ rl78_elf_relocate_section
                               + sec->output_section->vma
                               + sec->output_offset
                               + rel->r_addend);
+             else if (h->root.type == bfd_link_hash_undefweak)
+               RL78_STACK_PUSH (0);
              else
                _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
            }
@@ -1155,7 +1157,7 @@ rl78_get_reloc (long reloc)
 
 /* We support 16-bit pointers to code above 64k by generating a thunk
    below 64k containing a JMP instruction to the final address.  */
- 
+
 static bfd_boolean
 rl78_elf_check_relocs
     (bfd *                     abfd,
@@ -1173,7 +1175,7 @@ rl78_elf_check_relocs
 
   if (info->relocatable)
     return TRUE;
- 
+
   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
   sym_hashes = elf_sym_hashes (abfd);
   local_plt_offsets = elf_local_got_offsets (abfd);
@@ -1186,7 +1188,7 @@ rl78_elf_check_relocs
       struct elf_link_hash_entry *h;
       unsigned long r_symndx;
       bfd_vma *offset;
- 
+
       r_symndx = ELF32_R_SYM (rel->r_info);
       if (r_symndx < symtab_hdr->sh_info)
         h = NULL;
@@ -1196,8 +1198,12 @@ rl78_elf_check_relocs
          while (h->root.type == bfd_link_hash_indirect
                 || h->root.type == bfd_link_hash_warning)
            h = (struct elf_link_hash_entry *) h->root.u.i.link;
+
+         /* PR15323, ref flags aren't set for references in the same
+            object.  */
+         h->root.non_ir_ref = 1;
        }
- 
+
       switch (ELF32_R_TYPE (rel->r_info))
         {
          /* This relocation describes a 16-bit pointer to a function.
@@ -1251,7 +1257,7 @@ rl78_elf_check_relocs
          break;
         }
     }
- 
+
   return TRUE;
 }
 
@@ -1971,7 +1977,7 @@ struct {
   { 0x71, 0x58, 0x53, 0x5b },  /* CLR1 !addr16.0 */
   { 0x71, 0x68, 0x63, 0x6b },  /* CLR1 !addr16.0 */
   { 0x71, 0x78, 0x73, 0x7b },  /* CLR1 !addr16.0 */
-  
+
   { -1, -1, -1, -1 }
 };
 
@@ -2187,6 +2193,7 @@ rl78_elf_relax_section
        + srel->r_offset;
 
 #define GET_RELOC \
+      BFD_ASSERT (nrelocs > 0);                               \
       symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
       pcrel = symval - pc + srel->r_addend; \
       nrelocs --;
@@ -2227,7 +2234,13 @@ rl78_elf_relax_section
 
       if (irel->r_addend & RL78_RELAXA_BRA)
        {
-         GET_RELOC;
+         /* SKIP opcodes that skip non-branches will have a relax tag
+            but no corresponding symbol to relax against; we just
+            skip those.  */
+         if (irel->r_addend & RL78_RELAXA_RNUM)
+           {
+             GET_RELOC;
+           }
 
          switch (insn[0])
            {
@@ -2296,6 +2309,9 @@ rl78_elf_relax_section
              /* For SKIP/BR, we change the BR opcode and delete the
                 SKIP.  That way, we don't have to find and change the
                 relocation for the BR.  */
+             /* Note that, for the case where we're skipping some
+                other insn, we have no "other" reloc but that's safe
+                here anyway. */
              switch (insn[1])
                {
                case 0xc8: /* SKC */
@@ -2348,7 +2364,7 @@ rl78_elf_relax_section
                }
              break;
            }
-         
+
        }
 
       if (irel->r_addend & RL78_RELAXA_ADDR16)
@@ -2414,7 +2430,7 @@ rl78_elf_relax_section
                      insn[poff] = relax_addr16[idx].insn_for_saddr;
                      SNIP (poff+2, 1, R_RL78_RH_SADDR);
                    }
-               
+
                }
            }
        }