/* MIPS-specific support for ELF
- Copyright (C) 1993-2017 Free Software Foundation, Inc.
+ Copyright (C) 1993-2020 Free Software Foundation, Inc.
Most of the information added by Ian Lance Taylor, Cygnus Support,
<ian@cygnus.com>.
#include "libbfd.h"
#include "libiberty.h"
#include "elf-bfd.h"
+#include "ecoff-bfd.h"
#include "elfxx-mips.h"
#include "elf/mips.h"
#include "elf-vxworks.h"
#define LA25_LUI(VAL) (0x3c190000 | (VAL)) /* lui t9,VAL */
#define LA25_J(VAL) (0x08000000 | (((VAL) >> 2) & 0x3ffffff)) /* j VAL */
+#define LA25_BC(VAL) (0xc8000000 | (((VAL) >> 2) & 0x3ffffff)) /* bc VAL */
#define LA25_ADDIU(VAL) (0x27390000 | (VAL)) /* addiu t9,t9,VAL */
#define LA25_LUI_MICROMIPS(VAL) \
(0x41b90000 | (VAL)) /* lui t9,VAL */
/* The greatest dynamic symbol table index corresponding to an external
symbol without a GOT entry. */
bfd_size_type max_non_got_dynindx;
+ /* If non-NULL, output BFD for .MIPS.xhash finalization. */
+ bfd *output_bfd;
+ /* If non-NULL, pointer to contents of .MIPS.xhash for filling in
+ real final dynindx. */
+ bfd_byte *mipsxhash;
};
/* We make up to two PLT entries if needed, one for standard MIPS code
being called returns a floating point value. */
asection *call_fp_stub;
+ /* If non-zero, location in .MIPS.xhash to write real final dynindx. */
+ bfd_vma mipsxhash_loc;
+
/* The highest GGA_* value that satisfies all references to this symbol. */
unsigned int global_got_area : 2;
/* True if we suppress checks for invalid branches between ISA modes. */
bfd_boolean ignore_branch_isa;
+ /* True if we are targetting R6 compact branches. */
+ bfd_boolean compact_branches;
+
/* True if we're generating code for VxWorks. */
bfd_boolean is_vxworks;
/* True if we already reported the small-data section overflow. */
bfd_boolean small_data_overflow_reported;
+ /* True if we use the special `__gnu_absolute_zero' symbol. */
+ bfd_boolean use_absolute_zero;
+
+ /* True if we have been configured for a GNU target. */
+ bfd_boolean gnu_target;
+
/* Shortcuts to some dynamic sections, or NULL if they are not
being used. */
asection *srelplt2;
/* Put out word-sized data. */
#define MIPS_ELF_PUT_WORD(abfd, val, ptr) \
- (ABI_64_P (abfd) \
- ? bfd_put_64 (abfd, val, ptr) \
+ (ABI_64_P (abfd) \
+ ? bfd_put_64 (abfd, val, ptr) \
: bfd_put_32 (abfd, val, ptr))
/* The opcode for word-sized loads (LW or LD). */
_bfd_elf_add_dynamic_entry (info, tag, val)
#define MIPS_ELF_RTYPE_TO_HOWTO(abfd, rtype, rela) \
- (get_elf_backend_data (abfd)->elf_backend_mips_rtype_to_howto (rtype, rela))
+ (get_elf_backend_data (abfd)->elf_backend_mips_rtype_to_howto (abfd, rtype, rela))
/* The name of the dynamic relocation section. */
#define MIPS_ELF_REL_DYN_NAME(INFO) \
#define STUB_LW(abfd) \
((ABI_64_P (abfd) \
? 0xdf998010 /* ld t9,0x8010(gp) */ \
- : 0x8f998010)) /* lw t9,0x8010(gp) */
+ : 0x8f998010)) /* lw t9,0x8010(gp) */
#define STUB_MOVE 0x03e07825 /* or t7,ra,zero */
#define STUB_LUI(VAL) (0x3c180000 + (VAL)) /* lui t8,VAL */
#define STUB_JALR 0x0320f809 /* jalr ra,t9 */
+#define STUB_JALRC 0xf8190000 /* jalrc ra,t9 */
#define STUB_ORI(VAL) (0x37180000 + (VAL)) /* ori t8,t8,VAL */
#define STUB_LI16U(VAL) (0x34180000 + (VAL)) /* ori t8,zero,VAL unsigned */
#define STUB_LI16S(abfd, VAL) \
/* The name of the dynamic interpreter. This is put in the .interp
section. */
-#define ELF_DYNAMIC_INTERPRETER(abfd) \
- (ABI_N32_P (abfd) ? "/usr/lib32/libc.so.1" \
- : ABI_64_P (abfd) ? "/usr/lib64/libc.so.1" \
+#define ELF_DYNAMIC_INTERPRETER(abfd) \
+ (ABI_N32_P (abfd) ? "/usr/lib32/libc.so.1" \
+ : ABI_64_P (abfd) ? "/usr/lib64/libc.so.1" \
: "/usr/lib/libc.so.1")
#ifdef BFD64
0x2718fffe /* subu $24, $24, 2 */
};
+/* The format of the first PLT entry in an O32 executable using compact
+ jumps. */
+static const bfd_vma mipsr6_o32_exec_plt0_entry_compact[] =
+{
+ 0x3c1c0000, /* lui $28, %hi(&GOTPLT[0]) */
+ 0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */
+ 0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
+ 0x031cc023, /* subu $24, $24, $28 */
+ 0x03e07821, /* move $15, $31 # 32-bit move (addu) */
+ 0x0018c082, /* srl $24, $24, 2 */
+ 0x2718fffe, /* subu $24, $24, 2 */
+ 0xf8190000 /* jalrc $25 */
+};
+
/* The format of the first PLT entry in an N32 executable. Different
because gp ($28) is not available; we use t2 ($14) instead. */
static const bfd_vma mips_n32_exec_plt0_entry[] =
0x2718fffe /* subu $24, $24, 2 */
};
+/* The format of the first PLT entry in an N32 executable using compact
+ jumps. Different because gp ($28) is not available; we use t2 ($14)
+ instead. */
+static const bfd_vma mipsr6_n32_exec_plt0_entry_compact[] =
+{
+ 0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
+ 0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */
+ 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
+ 0x030ec023, /* subu $24, $24, $14 */
+ 0x03e07821, /* move $15, $31 # 32-bit move (addu) */
+ 0x0018c082, /* srl $24, $24, 2 */
+ 0x2718fffe, /* subu $24, $24, 2 */
+ 0xf8190000 /* jalrc $25 */
+};
+
/* The format of the first PLT entry in an N64 executable. Different
from N32 because of the increased size of GOT entries. */
static const bfd_vma mips_n64_exec_plt0_entry[] =
0x2718fffe /* subu $24, $24, 2 */
};
+/* The format of the first PLT entry in an N64 executable using compact
+ jumps. Different from N32 because of the increased size of GOT
+ entries. */
+static const bfd_vma mipsr6_n64_exec_plt0_entry_compact[] =
+{
+ 0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
+ 0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */
+ 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
+ 0x030ec023, /* subu $24, $24, $14 */
+ 0x03e0782d, /* move $15, $31 # 64-bit move (daddu) */
+ 0x0018c0c2, /* srl $24, $24, 3 */
+ 0x2718fffe, /* subu $24, $24, 2 */
+ 0xf8190000 /* jalrc $25 */
+};
+
+
/* The format of the microMIPS first PLT entry in an O32 executable.
We rely on v0 ($2) rather than t8 ($24) to contain the address
of the GOTPLT entry handled, so this stub may only be used when
0x03200008 /* jr $25 */
};
-/* In the following PLT entry the JR and ADDIU instructions will
- be swapped in _bfd_mips_elf_finish_dynamic_symbol because
- LOAD_INTERLOCKS_P will be true for MIPS R6. */
static const bfd_vma mipsr6_exec_plt_entry[] =
{
0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
0x03200009 /* jr $25 */
};
+static const bfd_vma mipsr6_exec_plt_entry_compact[] =
+{
+ 0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
+ 0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
+ 0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
+ 0xd8190000 /* jic $25, 0 */
+};
+
/* The format of subsequent MIPS16 o32 PLT entries. We use v0 ($2)
and v1 ($3) as temporaries because t8 ($24) and t9 ($25) are not
directly addressable. */
bfd_put_micromips_32 (const bfd *abfd, bfd_vma opcode, bfd_byte *ptr)
{
bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr);
- bfd_put_16 (abfd, opcode & 0xffff, ptr + 2);
+ bfd_put_16 (abfd, opcode & 0xffff, ptr + 2);
}
/* microMIPS 32-bit opcode helper retriever. */
ret->fn_stub = NULL;
ret->call_stub = NULL;
ret->call_fp_stub = NULL;
+ ret->mipsxhash_loc = 0;
ret->global_got_area = GGA_NONE;
ret->got_only_for_calls = TRUE;
ret->readonly_reloc = FALSE;
if (!sec->used_by_bfd)
{
struct _mips_elf_section_data *sdata;
- bfd_size_type amt = sizeof (*sdata);
+ size_t amt = sizeof (*sdata);
sdata = bfd_zalloc (abfd, amt);
if (sdata == NULL)
/* The symbolic header contains absolute file offsets and sizes to
read. */
#define READ(ptr, offset, count, size, type) \
- if (symhdr->count == 0) \
- debug->ptr = NULL; \
- else \
+ do \
{ \
- bfd_size_type amt = (bfd_size_type) size * symhdr->count; \
- debug->ptr = bfd_malloc (amt); \
- if (debug->ptr == NULL) \
+ size_t amt; \
+ debug->ptr = NULL; \
+ if (symhdr->count == 0) \
+ break; \
+ if (_bfd_mul_overflow (size, symhdr->count, &amt)) \
+ { \
+ bfd_set_error (bfd_error_file_too_big); \
+ goto error_return; \
+ } \
+ if (bfd_seek (abfd, symhdr->offset, SEEK_SET) != 0) \
goto error_return; \
- if (bfd_seek (abfd, symhdr->offset, SEEK_SET) != 0 \
- || bfd_bread (debug->ptr, amt, abfd) != amt) \
+ debug->ptr = (type) _bfd_malloc_and_read (abfd, amt, amt); \
+ if (debug->ptr == NULL) \
goto error_return; \
- }
+ } while (0)
READ (line, cbLineOffset, cbLine, sizeof (unsigned char), unsigned char *);
READ (external_dnr, cbDnOffset, idnMax, swap->external_dnr_size, void *);
{
const char *name;
- name = bfd_get_section_name (section->owner, section);
+ name = bfd_section_name (section);
return (FN_STUB_P (name)
|| CALL_STUB_P (name)
|| CALL_FP_STUB_P (name)
&& ! h->need_fn_stub)
{
/* We don't need the fn_stub; the only references to this symbol
- are 16 bit calls. Clobber the size to 0 to prevent it from
- being included in the link. */
+ are 16 bit calls. Clobber the size to 0 to prevent it from
+ being included in the link. */
h->fn_stub->size = 0;
h->fn_stub->flags &= ~SEC_RELOC;
h->fn_stub->reloc_count = 0;
&& ELF_ST_IS_MIPS16 (h->root.other))
{
/* We don't need the call_stub; this is a 16 bit function, so
- calls from other 16 bit functions are OK. Clobber the size
- to 0 to prevent it from being included in the link. */
+ calls from other 16 bit functions are OK. Clobber the size
+ to 0 to prevent it from being included in the link. */
h->call_stub->size = 0;
h->call_stub->flags &= ~SEC_RELOC;
h->call_stub->reloc_count = 0;
&& ELF_ST_IS_MIPS16 (h->root.other))
{
/* We don't need the call_stub; this is a 16 bit function, so
- calls from other 16 bit functions are OK. Clobber the size
- to 0 to prevent it from being included in the link. */
+ calls from other 16 bit functions are OK. Clobber the size
+ to 0 to prevent it from being included in the link. */
h->call_fp_stub->size = 0;
h->call_fp_stub->flags &= ~SEC_RELOC;
h->call_fp_stub->reloc_count = 0;
/* Make sure that any padding goes before the stub. */
align = input_section->alignment_power;
- if (!bfd_set_section_alignment (s->owner, s, align))
+ if (!bfd_set_section_alignment (s, align))
return FALSE;
if (align > 3)
s->size = (1 << align) - 8;
asection *input_section = stub->h->root.root.u.def.section;
s = htab->add_stub_section (".text", NULL,
input_section->output_section);
- if (s == NULL || !bfd_set_section_alignment (s->owner, s, 4))
+ if (s == NULL || !bfd_set_section_alignment (s, 4))
return FALSE;
htab->strampoline = s;
}
+--------------+--------------------------------+
| JALX | X| Imm 20:16 | Imm 25:21 |
+--------------+--------------------------------+
- | Immediate 15:0 |
+ | Immediate 15:0 |
+-----------------------------------------------+
JALX is the 5-bit value 00011. X is 0 for jal, 1 for jalx.
big-endian:
+--------+----------------------+
- | | |
- | | targ26-16 |
- |31 26|25 0|
+ | | |
+ | | targ26-16 |
+ |31 26|25 0|
+--------+----------------------+
little-endian:
+----------+------+-------------+
- | | | |
- | sub1 | | sub2 |
- |0 9|10 15|16 31|
+ | | | |
+ | sub1 | | sub2 |
+ |0 9|10 15|16 31|
+----------+--------------------+
where targ26-16 is sub1 followed by sub2 (i.e., the addend field A is
((sub1 << 16) | sub2)).
bfd *output_bfd, char **error_message)
{
if ((symbol->flags & (BSF_GLOBAL | BSF_WEAK)) != 0
- || bfd_is_und_section (bfd_get_section (symbol))
- || bfd_is_com_section (bfd_get_section (symbol)))
+ || bfd_is_und_section (bfd_asymbol_section (symbol))
+ || bfd_is_com_section (bfd_asymbol_section (symbol)))
/* The relocation is against a global symbol. */
return _bfd_mips_elf_generic_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd,
const char *name;
/* Use undefined class. Also, set class and type for some
- special symbols. */
+ special symbols. */
name = h->root.root.root.string;
if (strcmp (name, mips_elf_dynsym_rtproc_names[0]) == 0
|| strcmp (name, mips_elf_dynsym_rtproc_names[1]) == 0)
h->esym.asym.value =
mips_elf_hash_table (einfo->info)->procedure_count;
}
- else if (strcmp (name, "_gp_disp") == 0 && ! NEWABI_P (einfo->abfd))
- {
- h->esym.asym.sc = scAbs;
- h->esym.asym.st = stLabel;
- h->esym.asym.value = elf_gp (einfo->abfd);
- }
else
h->esym.asym.sc = scUndefined;
}
h->esym.asym.sc = scUndefined;
else
{
- name = bfd_section_name (output_section->owner, output_section);
+ name = bfd_section_name (output_section);
if (strcmp (name, ".text") == 0)
h->esym.asym.sc = scText;
| SEC_LINKER_CREATED
| SEC_READONLY));
if (sreloc == NULL
- || ! bfd_set_section_alignment (dynobj, sreloc,
- MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
+ || !bfd_set_section_alignment (sreloc,
+ MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
return NULL;
}
return sreloc;
bfd_boolean need_relocs = FALSE;
bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
- if (h && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
- && (!bfd_link_pic (info) || !SYMBOL_REFERENCES_LOCAL (info, h)))
+ if (h != NULL
+ && h->dynindx != -1
+ && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
+ && (bfd_link_dll (info) || !SYMBOL_REFERENCES_LOCAL (info, h)))
indx = h->dynindx;
- if ((bfd_link_pic (info) || indx != 0)
+ if ((bfd_link_dll (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
return 1;
case GOT_TLS_LDM:
- return bfd_link_pic (info) ? 1 : 0;
+ return bfd_link_dll (info) ? 1 : 0;
default:
return 0;
struct mips_elf_link_hash_entry *h,
bfd_vma value)
{
+ bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
struct mips_elf_link_hash_table *htab;
int indx;
asection *sreloc, *sgot;
sgot = htab->root.sgot;
indx = 0;
- if (h != NULL)
- {
- bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
-
- if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info),
- &h->root)
- && (!bfd_link_pic (info)
- || !SYMBOL_REFERENCES_LOCAL (info, &h->root)))
- indx = h->root.dynindx;
- }
+ if (h != NULL
+ && h->root.dynindx != -1
+ && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), &h->root)
+ && (bfd_link_dll (info) || !SYMBOL_REFERENCES_LOCAL (info, &h->root)))
+ indx = h->root.dynindx;
if (entry->tls_initialized)
return;
- if ((bfd_link_pic (info) || indx != 0)
+ if ((bfd_link_dll (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
sgot->contents + got_offset
+ MIPS_ELF_GOT_SIZE (abfd));
- if (!bfd_link_pic (info))
+ if (!bfd_link_dll (info))
MIPS_ELF_PUT_WORD (abfd, 1,
sgot->contents + got_offset);
else
for (p = output_bfd->sections; p ; p = p->next)
if ((p->flags & SEC_EXCLUDE) == 0
&& (p->flags & SEC_ALLOC) != 0
+ && elf_hash_table (info)->dynamic_relocs
&& !(*bed->elf_backend_omit_section_dynsym) (output_bfd, info, p))
++count;
}
at the head of the table; see `_bfd_elf_link_renumber_dynsyms'. */
hsd.max_local_dynindx = count_section_dynsyms (abfd, info) + 1;
hsd.max_non_got_dynindx = htab->root.local_dynsymcount + 1;
+ hsd.output_bfd = abfd;
+ if (htab->root.dynobj != NULL
+ && htab->root.dynamic_sections_created
+ && info->emit_gnu_hash)
+ {
+ asection *s = bfd_get_linker_section (htab->root.dynobj, ".MIPS.xhash");
+ BFD_ASSERT (s != NULL);
+ hsd.mipsxhash = s->contents;
+ BFD_ASSERT (hsd.mipsxhash != NULL);
+ }
+ else
+ hsd.mipsxhash = NULL;
mips_elf_link_hash_traverse (htab, mips_elf_sort_hash_table_f, &hsd);
/* There should have been enough room in the symbol table to
break;
}
+ /* Populate the .MIPS.xhash translation table entry with
+ the symbol dynindx. */
+ if (h->mipsxhash_loc != 0 && hsd->mipsxhash != NULL)
+ bfd_put_32 (hsd->output_bfd, h->root.dynindx,
+ hsd->mipsxhash + h->mipsxhash_loc);
+
return TRUE;
}
{
case STV_INTERNAL:
case STV_HIDDEN:
- _bfd_elf_link_hash_hide_symbol (info, h, TRUE);
+ _bfd_mips_elf_hide_symbol (info, h, TRUE);
break;
}
if (!bfd_elf_link_record_dynamic_symbol (info, h))
if (h->root.dynindx == -1)
return TRUE;
+ /* Absolute symbols, if ever they need a GOT entry, cannot ever go
+ to the local GOT, as they would be implicitly relocated by the
+ base address by the dynamic loader. */
+ if (bfd_is_abs_symbol (&h->root.root))
+ return FALSE;
+
/* Symbols that bind locally can (and in the case of forced-local
symbols, must) live in the local GOT. */
if (h->got_only_for_calls
s = bfd_make_section_anyway_with_flags (abfd, ".compact_rel", flags);
if (s == NULL
- || ! bfd_set_section_alignment (abfd, s,
- MIPS_ELF_LOG_FILE_ALIGN (abfd)))
+ || !bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd)))
return FALSE;
s->size = sizeof (Elf32_External_compact_rel);
in the function stub generation and in the linker script. */
s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
if (s == NULL
- || ! bfd_set_section_alignment (abfd, s, 4))
+ || !bfd_set_section_alignment (s, 4))
return FALSE;
htab->root.sgot = s;
}
}
\f
+/* Obtain the field relocated by RELOCATION. */
+
+static bfd_vma
+mips_elf_obtain_contents (reloc_howto_type *howto,
+ const Elf_Internal_Rela *relocation,
+ bfd *input_bfd, bfd_byte *contents)
+{
+ bfd_vma x = 0;
+ bfd_byte *location = contents + relocation->r_offset;
+ unsigned int size = bfd_get_reloc_size (howto);
+
+ /* Obtain the bytes. */
+ if (size != 0)
+ x = bfd_get (8 * size, input_bfd, location);
+
+ return x;
+}
+
+/* Store the field relocated by RELOCATION. */
+
+static void
+mips_elf_store_contents (reloc_howto_type *howto,
+ const Elf_Internal_Rela *relocation,
+ bfd *input_bfd, bfd_byte *contents, bfd_vma x)
+{
+ bfd_byte *location = contents + relocation->r_offset;
+ unsigned int size = bfd_get_reloc_size (howto);
+
+ /* Put the value into the output. */
+ if (size != 0)
+ bfd_put (8 * size, input_bfd, x, location);
+}
+
+/* Try to patch a load from GOT instruction in CONTENTS pointed to by
+ RELOCATION described by HOWTO, with a move of 0 to the load target
+ register, returning TRUE if that is successful and FALSE otherwise.
+ If DOIT is FALSE, then only determine it patching is possible and
+ return status without actually changing CONTENTS.
+*/
+
+static bfd_boolean
+mips_elf_nullify_got_load (bfd *input_bfd, bfd_byte *contents,
+ const Elf_Internal_Rela *relocation,
+ reloc_howto_type *howto, bfd_boolean doit)
+{
+ int r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
+ bfd_byte *location = contents + relocation->r_offset;
+ bfd_boolean nullified = TRUE;
+ bfd_vma x;
+
+ _bfd_mips_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location);
+
+ /* Obtain the current value. */
+ x = mips_elf_obtain_contents (howto, relocation, input_bfd, contents);
+
+ /* Note that in the unshuffled MIPS16 encoding RX is at bits [21:19]
+ while RY is at bits [18:16] of the combined 32-bit instruction word. */
+ if (mips16_reloc_p (r_type)
+ && (((x >> 22) & 0x3ff) == 0x3d3 /* LW */
+ || ((x >> 22) & 0x3ff) == 0x3c7)) /* LD */
+ x = (0x3cd << 22) | (x & (7 << 16)) << 3; /* LI */
+ else if (micromips_reloc_p (r_type)
+ && ((x >> 26) & 0x37) == 0x37) /* LW/LD */
+ x = (0xc << 26) | (x & (0x1f << 21)); /* ADDIU */
+ else if (((x >> 26) & 0x3f) == 0x23 /* LW */
+ || ((x >> 26) & 0x3f) == 0x37) /* LD */
+ x = (0x9 << 26) | (x & (0x1f << 16)); /* ADDIU */
+ else
+ nullified = FALSE;
+
+ /* Put the value into the output. */
+ if (doit && nullified)
+ mips_elf_store_contents (howto, relocation, input_bfd, contents, x);
+
+ _bfd_mips_elf_reloc_shuffle (input_bfd, r_type, FALSE, location);
+
+ return nullified;
+}
+
/* Calculate the value produced by the RELOCATION (which comes from
the INPUT_BFD). The ADDEND is the addend to use for this
RELOCATION; RELOCATION->R_ADDEND is ignored.
static bfd_reloc_status_type
mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
- asection *input_section,
+ asection *input_section, bfd_byte *contents,
struct bfd_link_info *info,
const Elf_Internal_Rela *relocation,
bfd_vma addend, reloc_howto_type *howto,
bfd_boolean target_is_micromips_code_p = FALSE;
struct mips_elf_link_hash_table *htab;
bfd *dynobj;
+ bfd_boolean resolved_to_zero;
dynobj = elf_hash_table (info)->dynobj;
htab = mips_elf_hash_table (info);
symtab_hdr->sh_link,
sym->st_name);
if (*namep == NULL || **namep == '\0')
- *namep = bfd_section_name (input_bfd, sec);
+ *namep = bfd_section_name (sec);
/* For relocations against a section symbol and ones against no
- symbol (absolute relocations) infer the ISA mode from the addend. */
+ symbol (absolute relocations) infer the ISA mode from the addend. */
if (section_p || r_symndx == STN_UNDEF)
{
target_is_16_bit_code_p = (addend & 1) && !micromips_p;
target_is_micromips_code_p = (addend & 1) && micromips_p;
}
/* For relocations against an absolute symbol infer the ISA mode
- from the value of the symbol plus addend. */
+ from the value of the symbol plus addend. */
else if (bfd_is_abs_section (sec))
{
target_is_16_bit_code_p = ((symbol + addend) & 1) && !micromips_p;
{
/* If this is a dynamic link, we should have created a
_DYNAMIC_LINK symbol or _DYNAMIC_LINKING(for normal mips) symbol
- in in _bfd_mips_elf_create_dynamic_sections.
+ in _bfd_mips_elf_create_dynamic_sections.
Otherwise, we should define the symbol with a value of 0.
FIXME: It should probably get into the symbol table
somehow as well. */
}
else
{
+ bfd_boolean reject_undefined
+ = (info->unresolved_syms_in_objects == RM_GENERATE_ERROR
+ || ELF_ST_VISIBILITY (h->root.other) != STV_DEFAULT);
+
(*info->callbacks->undefined_symbol)
(info, h->root.root.root.string, input_bfd,
- input_section, relocation->r_offset,
- (info->unresolved_syms_in_objects == RM_GENERATE_ERROR)
- || ELF_ST_VISIBILITY (h->root.other));
- return bfd_reloc_undefined;
+ input_section, relocation->r_offset, reject_undefined);
+
+ if (reject_undefined)
+ return bfd_reloc_undefined;
+
+ symbol = 0;
}
target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other);
sec = NULL;
for (o = input_bfd->sections; o != NULL; o = o->next)
{
- if (CALL_FP_STUB_P (bfd_get_section_name (input_bfd, o)))
+ if (CALL_FP_STUB_P (bfd_section_name (o)))
{
sec = h->call_fp_stub;
break;
sec = h->call_stub;
else
sec = h->call_fp_stub;
- }
+ }
BFD_ASSERT (sec->size > 0);
symbol = sec->output_section->vma + sec->output_offset;
&& (target_is_16_bit_code_p
|| target_is_micromips_code_p))));
+ resolved_to_zero = (h != NULL
+ && UNDEFWEAK_NO_DYNAMIC_RELOC (info, &h->root));
+
+ switch (r_type)
+ {
+ case R_MIPS16_CALL16:
+ case R_MIPS16_GOT16:
+ case R_MIPS_CALL16:
+ case R_MIPS_GOT16:
+ case R_MIPS_GOT_PAGE:
+ case R_MIPS_GOT_DISP:
+ case R_MIPS_GOT_LO16:
+ case R_MIPS_CALL_LO16:
+ case R_MICROMIPS_CALL16:
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_GOT_PAGE:
+ case R_MICROMIPS_GOT_DISP:
+ case R_MICROMIPS_GOT_LO16:
+ case R_MICROMIPS_CALL_LO16:
+ if (resolved_to_zero
+ && !bfd_link_relocatable (info)
+ && mips_elf_nullify_got_load (input_bfd, contents,
+ relocation, howto, TRUE))
+ return bfd_reloc_continue;
+
+ /* Fall through. */
+ case R_MIPS_GOT_HI16:
+ case R_MIPS_CALL_HI16:
+ case R_MICROMIPS_GOT_HI16:
+ case R_MICROMIPS_CALL_HI16:
+ if (resolved_to_zero
+ && htab->use_absolute_zero
+ && bfd_link_pic (info))
+ {
+ /* Redirect to the special `__gnu_absolute_zero' symbol. */
+ h = mips_elf_link_hash_lookup (htab, "__gnu_absolute_zero",
+ FALSE, FALSE, FALSE);
+ BFD_ASSERT (h != NULL);
+ }
+ break;
+ }
+
local_p = (h == NULL || mips_use_local_got_p (info, h));
gp0 = _bfd_get_gp_value (input_bfd);
&& r_symndx != STN_UNDEF
&& (h == NULL
|| h->root.root.type != bfd_link_hash_undefweak
- || ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT)
+ || (ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT
+ && !resolved_to_zero))
&& (input_section->flags & SEC_ALLOC) != 0)
{
/* If we're creating a shared library, then we can't know
if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
&& (*cross_mode_jump_p
? (value & 3) != (r_type == R_MIPS_26)
- : (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26)))
+ : (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26)))
return bfd_reloc_outofrange;
value >>= shift;
else
{
/* For MIPS16 ABI code we generate this sequence
- 0: li $v0,%hi(_gp_disp)
- 4: addiupc $v1,%lo(_gp_disp)
- 8: sll $v0,16
+ 0: li $v0,%hi(_gp_disp)
+ 4: addiupc $v1,%lo(_gp_disp)
+ 8: sll $v0,16
12: addu $v0,$v1
14: move $gp,$v0
So the offsets of hi and lo relocs are the same, but the
addend = _bfd_mips_elf_sign_extend (addend, 18);
/* No need to exclude weak undefined symbols here as they resolve
- to 0 and never set `*cross_mode_jump_p', so this alignment check
- will never trigger for them. */
+ to 0 and never set `*cross_mode_jump_p', so this alignment check
+ will never trigger for them. */
if (*cross_mode_jump_p
? ((symbol + addend) & 3) != 1
: ((symbol + addend) & 3) != 0)
case R_MIPS_PCHI16:
value = mips_elf_high (symbol + addend - p);
- if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
- overflowed_p = mips_elf_overflow_p (value, 16);
value &= howto->dst_mask;
break;
return overflowed_p ? bfd_reloc_overflow : bfd_reloc_ok;
}
-/* Obtain the field relocated by RELOCATION. */
-
-static bfd_vma
-mips_elf_obtain_contents (reloc_howto_type *howto,
- const Elf_Internal_Rela *relocation,
- bfd *input_bfd, bfd_byte *contents)
-{
- bfd_vma x = 0;
- bfd_byte *location = contents + relocation->r_offset;
- unsigned int size = bfd_get_reloc_size (howto);
-
- /* Obtain the bytes. */
- if (size != 0)
- x = bfd_get (8 * size, input_bfd, location);
-
- return x;
-}
-
/* It has been determined that the result of the RELOCATION is the
VALUE. Use HOWTO to place VALUE into the output file at the
appropriate position. The SECTION is the section to which the
bfd_vma x;
bfd_byte *location;
int r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
- unsigned int size;
/* Figure out where the relocation is occurring. */
location = contents + relocation->r_offset;
: opcode == 0x1d)
{
info->callbacks->einfo
- (_("%X%H: Unsupported JALX to the same ISA mode\n"),
+ (_("%X%H: unsupported JALX to the same ISA mode\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
}
/* If the opcode is not JAL or JALX, there's a problem. We cannot
- convert J or JALS to JALX. */
+ convert J or JALS to JALX. */
if (!ok)
{
info->callbacks->einfo
- (_("%X%H: Unsupported jump between ISA modes; "
+ (_("%X%H: unsupported jump between ISA modes; "
"consider recompiling with interlinking enabled\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
/* Make this the JALX opcode. */
- x = (x & ~(0x3f << 26)) | (jalx_opcode << 26);
+ x = (x & ~(0x3fu << 26)) | (jalx_opcode << 26);
}
else if (cross_mode_jump_p && b_reloc_p (r_type))
{
bfd_boolean ok = FALSE;
bfd_vma opcode = x >> 16;
bfd_vma jalx_opcode = 0;
+ bfd_vma sign_bit = 0;
bfd_vma addr;
bfd_vma dest;
{
ok = opcode == 0x4060;
jalx_opcode = 0x3c;
+ sign_bit = 0x10000;
value <<= 1;
}
else if (r_type == R_MIPS_PC16 || r_type == R_MIPS_GNU_REL16_S2)
{
ok = opcode == 0x411;
jalx_opcode = 0x1d;
+ sign_bit = 0x20000;
value <<= 2;
}
+ input_section->output_offset
+ relocation->r_offset
+ 4);
- dest = addr + (((value & 0x3ffff) ^ 0x20000) - 0x20000);
+ dest = (addr
+ + (((value & ((sign_bit << 1) - 1)) ^ sign_bit) - sign_bit));
if ((addr >> 28) << 28 != (dest >> 28) << 28)
{
info->callbacks->einfo
- (_("%X%H: Cannot convert branch between ISA modes "
+ (_("%X%H: cannot convert branch between ISA modes "
"to JALX: relocation out of range\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
else if (!mips_elf_hash_table (info)->ignore_branch_isa)
{
info->callbacks->einfo
- (_("%X%H: Unsupported branch between ISA modes\n"),
+ (_("%X%H: unsupported branch between ISA modes\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
}
/* Put the value into the output. */
- size = bfd_get_reloc_size (howto);
- if (size != 0)
- bfd_put (8 * size, input_bfd, x, location);
+ mips_elf_store_contents (howto, relocation, input_bfd, contents, x);
_bfd_mips_elf_reloc_shuffle (input_bfd, r_type, !bfd_link_relocatable (info),
location);
case E_MIPS_MACH_LS2F:
return bfd_mach_mips_loongson_2f;
- case E_MIPS_MACH_LS3A:
- return bfd_mach_mips_loongson_3a;
+ case E_MIPS_MACH_GS464:
+ return bfd_mach_mips_gs464;
+
+ case E_MIPS_MACH_GS464E:
+ return bfd_mach_mips_gs464e;
+
+ case E_MIPS_MACH_GS264E:
+ return bfd_mach_mips_gs264e;
case E_MIPS_MACH_OCTEON3:
return bfd_mach_mips_octeon3;
case E_MIPS_MACH_XLR:
return bfd_mach_mips_xlr;
+ case E_MIPS_MACH_IAMR2:
+ return bfd_mach_mips_interaptiv_mr2;
+
default:
switch (flags & EF_MIPS_ARCH)
{
{
asym->section = section;
/* MIPS_TEXT is a bit special, the address is not an offset
- to the base of the .text section. So substract the section
+ to the base of the .text section. So subtract the section
base address to make it an offset. */
asym->value -= section->vma;
}
{
asym->section = section;
/* MIPS_DATA is a bit special, the address is not an offset
- to the base of the .data section. So substract the section
+ to the base of the .data section. So subtract the section
base address to make it an offset. */
asym->value -= section->vma;
}
We therefore take the following approach:
- If ABFD contains a .gcc_compiled_longXX section, use it to
- determine the pointer size.
+ determine the pointer size.
- Otherwise check the type of the first relocation. Assume that
- the LP64 ABI is being used if the relocation is of type R_MIPS_64.
+ the LP64 ABI is being used if the relocation is of type R_MIPS_64.
- Otherwise punt.
did so. */
unsigned int
-_bfd_mips_elf_eh_frame_address_size (bfd *abfd, asection *sec)
+_bfd_mips_elf_eh_frame_address_size (bfd *abfd, const asection *sec)
{
if (elf_elfheader (abfd)->e_ident[EI_CLASS] == ELFCLASS64)
return 8;
{
bfd_byte buf[4];
- BFD_ASSERT (hdr->sh_size == sizeof (Elf32_External_RegInfo));
BFD_ASSERT (hdr->contents == NULL);
+ if (hdr->sh_size != sizeof (Elf32_External_RegInfo))
+ {
+ _bfd_error_handler
+ (_("%pB: incorrect `.reginfo' section size; "
+ "expected %" PRIu64 ", got %" PRIu64),
+ abfd, (uint64_t) sizeof (Elf32_External_RegInfo),
+ (uint64_t) hdr->sh_size);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
if (bfd_seek (abfd,
hdr->sh_offset + sizeof (Elf32_External_RegInfo) - 4,
SEEK_SET) != 0)
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Warning: bad `%s' option size %u smaller than its header"),
+ (_("%pB: warning: bad `%s' option size %u smaller than"
+ " its header"),
abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size);
break;
}
if (hdr->bfd_section != NULL)
{
- const char *name = bfd_get_section_name (abfd, hdr->bfd_section);
+ const char *name = bfd_section_name (hdr->bfd_section);
/* .sbss is not handled specially here because the GNU/Linux
prelinker can convert .sbss from NOBITS to PROGBITS and
/* Handle a MIPS specific section when reading an object file. This
is called when elfcode.h finds a section with an unknown type.
- This routine supports both the 32-bit and 64-bit ELF ABI.
-
- FIXME: We need to handle the SHF_MIPS_GPREL flag, but I'm not sure
- how to. */
+ This routine supports both the 32-bit and 64-bit ELF ABI. */
bfd_boolean
_bfd_mips_elf_section_from_shdr (bfd *abfd,
break;
case SHT_MIPS_DWARF:
if (! CONST_STRNEQ (name, ".debug_")
- && ! CONST_STRNEQ (name, ".zdebug_"))
+ && ! CONST_STRNEQ (name, ".zdebug_"))
return FALSE;
break;
case SHT_MIPS_SYMBOL_LIB:
&& ! CONST_STRNEQ (name, ".MIPS.post_rel"))
return FALSE;
break;
+ case SHT_MIPS_XHASH:
+ if (strcmp (name, ".MIPS.xhash") != 0)
+ return FALSE;
default:
break;
}
if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
return FALSE;
+ if (hdr->sh_flags & SHF_MIPS_GPREL)
+ flags |= SEC_SMALL_DATA;
+
if (flags)
{
- if (! bfd_set_section_flags (abfd, hdr->bfd_section,
- (bfd_get_section_flags (abfd,
- hdr->bfd_section)
- | flags)))
+ if (!bfd_set_section_flags (hdr->bfd_section,
+ (bfd_section_flags (hdr->bfd_section)
+ | flags)))
return FALSE;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Warning: bad `%s' option size %u smaller than its header"),
+ (_("%pB: warning: bad `%s' option size %u smaller than"
+ " its header"),
abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size);
break;
}
bfd_boolean
_bfd_mips_elf_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, asection *sec)
{
- const char *name = bfd_get_section_name (abfd, sec);
+ const char *name = bfd_section_name (sec);
if (strcmp (name, ".liblist") == 0)
{
{
hdr->sh_type = SHT_MIPS_DEBUG;
/* In a shared object on IRIX 5.3, the .mdebug section has an
- entsize of 0. FIXME: Does this matter? */
+ entsize of 0. FIXME: Does this matter? */
if (SGI_COMPAT (abfd) && (abfd->flags & DYNAMIC) != 0)
hdr->sh_entsize = 0;
else
{
hdr->sh_type = SHT_MIPS_REGINFO;
/* In a shared object on IRIX 5.3, the .reginfo section has an
- entsize of 0x18. FIXME: Does this matter? */
+ entsize of 0x18. FIXME: Does this matter? */
if (SGI_COMPAT (abfd))
{
if ((abfd->flags & DYNAMIC) != 0)
hdr->sh_entsize = sizeof (Elf_External_ABIFlags_v0);
}
else if (CONST_STRNEQ (name, ".debug_")
- || CONST_STRNEQ (name, ".zdebug_"))
+ || CONST_STRNEQ (name, ".zdebug_"))
{
hdr->sh_type = SHT_MIPS_DWARF;
{
hdr->sh_type = SHT_MIPS_SYMBOL_LIB;
/* The sh_link and sh_info fields are set in
- final_write_processing. */
+ final_write_processing. */
}
else if (CONST_STRNEQ (name, ".MIPS.events")
|| CONST_STRNEQ (name, ".MIPS.post_rel"))
hdr->sh_flags |= SHF_ALLOC;
hdr->sh_entsize = 8;
}
+ else if (strcmp (name, ".MIPS.xhash") == 0)
+ {
+ hdr->sh_type = SHT_MIPS_XHASH;
+ hdr->sh_flags |= SHF_ALLOC;
+ hdr->sh_entsize = get_elf_backend_data(abfd)->s->arch_size == 64 ? 0 : 4;
+ }
/* The generic elf_fake_sections will set up REL_HDR using the default
kind of relocations. We used to set up a second header for the
_bfd_mips_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
asection *sec, int *retval)
{
- if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
+ if (strcmp (bfd_section_name (sec), ".scommon") == 0)
{
*retval = SHN_MIPS_SCOMMON;
return TRUE;
}
- if (strcmp (bfd_get_section_name (abfd, sec), ".acommon") == 0)
+ if (strcmp (bfd_section_name (sec), ".acommon") == 0)
{
*retval = SHN_MIPS_ACOMMON;
return TRUE;
{
asymbol *elf_text_symbol;
asection *elf_text_section;
- bfd_size_type amt = sizeof (asection);
+ size_t amt = sizeof (asection);
elf_text_section = bfd_zalloc (abfd, amt);
if (elf_text_section == NULL)
elf_text_symbol->section = elf_text_section;
}
/* This code used to do *secp = bfd_und_section_ptr if
- bfd_link_pic (info). I don't know why, and that doesn't make sense,
- so I took it out. */
+ bfd_link_pic (info). I don't know why, and that doesn't make sense,
+ so I took it out. */
*secp = mips_elf_tdata (abfd)->elf_text_section;
break;
{
asymbol *elf_data_symbol;
asection *elf_data_section;
- bfd_size_type amt = sizeof (asection);
+ size_t amt = sizeof (asection);
elf_data_section = bfd_zalloc (abfd, amt);
if (elf_data_section == NULL)
elf_data_symbol->section = elf_data_section;
}
/* This code used to do *secp = bfd_und_section_ptr if
- bfd_link_pic (info). I don't know why, and that doesn't make sense,
- so I took it out. */
+ bfd_link_pic (info). I don't know why, and that doesn't make sense,
+ so I took it out. */
*secp = mips_elf_tdata (abfd)->elf_data_section;
break;
s = bfd_get_linker_section (abfd, ".dynamic");
if (s != NULL)
{
- if (! bfd_set_section_flags (abfd, s, flags))
+ if (!bfd_set_section_flags (s, flags))
return FALSE;
}
}
MIPS_ELF_STUB_SECTION_NAME (abfd),
flags | SEC_CODE);
if (s == NULL
- || ! bfd_set_section_alignment (abfd, s,
- MIPS_ELF_LOG_FILE_ALIGN (abfd)))
+ || !bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd)))
return FALSE;
htab->sstubs = s;
s = bfd_make_section_anyway_with_flags (abfd, ".rld_map",
flags &~ (flagword) SEC_READONLY);
if (s == NULL
- || ! bfd_set_section_alignment (abfd, s,
- MIPS_ELF_LOG_FILE_ALIGN (abfd)))
+ || !bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd)))
return FALSE;
}
+ /* Create .MIPS.xhash section. */
+ if (info->emit_gnu_hash)
+ s = bfd_make_section_anyway_with_flags (abfd, ".MIPS.xhash",
+ flags | SEC_READONLY);
+
/* On IRIX5, we adjust add some additional symbols and change the
alignments of several sections. There is no ABI documentation
indicating that this is necessary on IRIX6, nor any evidence that
return FALSE;
h = (struct elf_link_hash_entry *) bh;
+ h->mark = 1;
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_SECTION;
/* Change alignments of some sections. */
s = bfd_get_linker_section (abfd, ".hash");
if (s != NULL)
- (void) bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
+ bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
s = bfd_get_linker_section (abfd, ".dynsym");
if (s != NULL)
- (void) bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
+ bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
s = bfd_get_linker_section (abfd, ".dynstr");
if (s != NULL)
- (void) bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
+ bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
/* ??? */
s = bfd_get_section_by_name (abfd, ".reginfo");
if (s != NULL)
- (void) bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
+ bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
s = bfd_get_linker_section (abfd, ".dynamic");
if (s != NULL)
- (void) bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
+ bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
}
if (bfd_link_executable (info))
return entry;
}
+/* Define the special `__gnu_absolute_zero' symbol. We only need this
+ for PIC code, as otherwise there is no load-time relocation involved
+ and local GOT entries whose value is zero at static link time will
+ retain their value at load time. */
+
+static bfd_boolean
+mips_elf_define_absolute_zero (bfd *abfd, struct bfd_link_info *info,
+ struct mips_elf_link_hash_table *htab,
+ unsigned int r_type)
+{
+ union
+ {
+ struct elf_link_hash_entry *eh;
+ struct bfd_link_hash_entry *bh;
+ }
+ hzero;
+
+ BFD_ASSERT (!htab->use_absolute_zero);
+ BFD_ASSERT (bfd_link_pic (info));
+
+ hzero.bh = NULL;
+ if (!_bfd_generic_link_add_one_symbol (info, abfd, "__gnu_absolute_zero",
+ BSF_GLOBAL, bfd_abs_section_ptr, 0,
+ NULL, FALSE, FALSE, &hzero.bh))
+ return FALSE;
+
+ BFD_ASSERT (hzero.bh != NULL);
+ hzero.eh->size = 0;
+ hzero.eh->type = STT_NOTYPE;
+ hzero.eh->other = STV_PROTECTED;
+ hzero.eh->def_regular = 1;
+ hzero.eh->non_elf = 0;
+
+ if (!mips_elf_record_global_got_symbol (hzero.eh, abfd, info, TRUE, r_type))
+ return FALSE;
+
+ htab->use_absolute_zero = TRUE;
+
+ return TRUE;
+}
+
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table and record the need for
standard MIPS and compressed procedure linkage table entries. */
extsymoff = (elf_bad_symtab (abfd)) ? 0 : symtab_hdr->sh_info;
bed = get_elf_backend_data (abfd);
- rel_end = relocs + sec->reloc_count * bed->s->int_rels_per_ext_rel;
+ rel_end = relocs + sec->reloc_count;
/* Check for the mips16 stub sections. */
- name = bfd_get_section_name (abfd, sec);
+ name = bfd_section_name (sec);
if (FN_STUB_P (name))
{
unsigned long r_symndx;
/* Look at the relocation information to figure out which symbol
- this is for. */
+ this is for. */
r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Warning: cannot determine the target function for"
+ (_("%pB: warning: cannot determine the target function for"
" stub section `%s'"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
asection *o;
/* This stub is for a local symbol. This stub will only be
- needed if there is some relocation in this BFD, other
- than a 16 bit function call, which refers to this symbol. */
+ needed if there is some relocation in this BFD, other
+ than a 16 bit function call, which refers to this symbol. */
for (o = abfd->sections; o != NULL; o = o->next)
{
Elf_Internal_Rela *sec_relocs;
if (o == NULL)
{
/* There is no non-call reloc for this stub, so we do
- not need it. Since this function is called before
- the linker maps input sections to output sections, we
- can easily discard it by setting the SEC_EXCLUDE
- flag. */
+ not need it. Since this function is called before
+ the linker maps input sections to output sections, we
+ can easily discard it by setting the SEC_EXCLUDE
+ flag. */
sec->flags |= SEC_EXCLUDE;
return TRUE;
}
/* Record this stub in an array of local symbol stubs for
- this BFD. */
+ this BFD. */
if (mips_elf_tdata (abfd)->local_stubs == NULL)
{
unsigned long symcount;
mips_elf_tdata (abfd)->local_stubs[r_symndx] = sec;
/* We don't need to set mips16_stubs_seen in this case.
- That flag is used to see whether we need to look through
- the global symbol table for stubs. We don't need to set
- it here, because we just have a local stub. */
+ That flag is used to see whether we need to look through
+ the global symbol table for stubs. We don't need to set
+ it here, because we just have a local stub. */
}
else
{
asection **loc;
/* Look at the relocation information to figure out which symbol
- this is for. */
+ this is for. */
r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Warning: cannot determine the target function for"
+ (_("%pB: warning: cannot determine the target function for"
" stub section `%s'"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
asection *o;
/* This stub is for a local symbol. This stub will only be
- needed if there is some relocation (R_MIPS16_26) in this BFD
- that refers to this symbol. */
+ needed if there is some relocation (R_MIPS16_26) in this BFD
+ that refers to this symbol. */
for (o = abfd->sections; o != NULL; o = o->next)
{
Elf_Internal_Rela *sec_relocs;
if (o == NULL)
{
/* There is no non-call reloc for this stub, so we do
- not need it. Since this function is called before
- the linker maps input sections to output sections, we
- can easily discard it by setting the SEC_EXCLUDE
- flag. */
+ not need it. Since this function is called before
+ the linker maps input sections to output sections, we
+ can easily discard it by setting the SEC_EXCLUDE
+ flag. */
sec->flags |= SEC_EXCLUDE;
return TRUE;
}
/* Record this stub in an array of local symbol call_stubs for
- this BFD. */
+ this BFD. */
if (mips_elf_tdata (abfd)->local_call_stubs == NULL)
{
unsigned long symcount;
mips_elf_tdata (abfd)->local_call_stubs[r_symndx] = sec;
/* We don't need to set mips16_stubs_seen in this case.
- That flag is used to see whether we need to look through
- the global symbol table for stubs. We don't need to set
- it here, because we just have a local stub. */
+ That flag is used to see whether we need to look through
+ the global symbol table for stubs. We don't need to set
+ it here, because we just have a local stub. */
}
else
{
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Malformed reloc detected for section %s"),
+ (_("%pB: malformed reloc detected for section %s"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
return FALSE;
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
-
- /* PR15323, ref flags aren't set for references in the
- same object. */
- h->root.non_ir_ref = 1;
}
}
/* Fall through. */
case R_MIPS_GOT16:
- case R_MIPS_GOT_HI16:
case R_MIPS_GOT_LO16:
case R_MIPS_GOT_PAGE:
- case R_MIPS_GOT_OFST:
case R_MIPS_GOT_DISP:
+ case R_MIPS16_GOT16:
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_GOT_LO16:
+ case R_MICROMIPS_GOT_PAGE:
+ case R_MICROMIPS_GOT_DISP:
+ /* If we have a symbol that will resolve to zero at static link
+ time and it is used by a GOT relocation applied to code we
+ cannot relax to an immediate zero load, then we will be using
+ the special `__gnu_absolute_zero' symbol whose value is zero
+ at dynamic load time. We ignore HI16-type GOT relocations at
+ this stage, because their handling will depend entirely on
+ the corresponding LO16-type GOT relocation. */
+ if (!call_hi16_reloc_p (r_type)
+ && h != NULL
+ && bfd_link_pic (info)
+ && !htab->use_absolute_zero
+ && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
+ {
+ bfd_boolean rel_reloc;
+
+ if (!mips_elf_get_section_contents (abfd, sec, &contents))
+ return FALSE;
+
+ rel_reloc = mips_elf_rel_relocation_p (abfd, sec, relocs, rel);
+ howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, !rel_reloc);
+
+ if (!mips_elf_nullify_got_load (abfd, contents, rel, howto,
+ FALSE))
+ if (!mips_elf_define_absolute_zero (abfd, info, htab, r_type))
+ return FALSE;
+ }
+
+ /* Fall through. */
+ case R_MIPS_GOT_HI16:
+ case R_MIPS_GOT_OFST:
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_GD:
case R_MIPS_TLS_LDM:
- case R_MIPS16_GOT16:
case R_MIPS16_TLS_GOTTPREL:
case R_MIPS16_TLS_GD:
case R_MIPS16_TLS_LDM:
- case R_MICROMIPS_GOT16:
case R_MICROMIPS_GOT_HI16:
- case R_MICROMIPS_GOT_LO16:
- case R_MICROMIPS_GOT_PAGE:
case R_MICROMIPS_GOT_OFST:
- case R_MICROMIPS_GOT_DISP:
case R_MICROMIPS_TLS_GOTTPREL:
case R_MICROMIPS_TLS_GD:
case R_MICROMIPS_TLS_LDM:
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: GOT reloc at 0x%lx not expected in executables"),
- abfd, (unsigned long) rel->r_offset);
+ (_("%pB: GOT reloc at %#" PRIx64 " not expected in executables"),
+ abfd, (uint64_t) rel->r_offset);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: CALL16 reloc at 0x%lx not against global symbol"),
- abfd, (unsigned long) rel->r_offset);
+ (_("%pB: CALL16 reloc at %#" PRIx64 " not against global symbol"),
+ abfd, (uint64_t) rel->r_offset);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_MIPS_GNU_VTENTRY:
- BFD_ASSERT (h != NULL);
- if (h != NULL
- && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
+ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
return FALSE;
break;
}
/* Record the need for a PLT entry. At this point we don't know
- yet if we are going to create a PLT in the first place, but
- we only record whether the relocation requires a standard MIPS
- or a compressed code entry anyway. If we don't make a PLT after
- all, then we'll just ignore these arrangements. Likewise if
- a PLT entry is not created because the symbol is satisfied
- locally. */
+ yet if we are going to create a PLT in the first place, but
+ we only record whether the relocation requires a standard MIPS
+ or a compressed code entry anyway. If we don't make a PLT after
+ all, then we'll just ignore these arrangements. Likewise if
+ a PLT entry is not created because the symbol is satisfied
+ locally. */
if (h != NULL
&& (branch_reloc_p (r_type)
|| mips16_branch_reloc_p (r_type)
{
switch (r_type)
{
+ case R_MIPS_TLS_TPREL_HI16:
+ case R_MIPS16_TLS_TPREL_HI16:
+ case R_MICROMIPS_TLS_TPREL_HI16:
+ case R_MIPS_TLS_TPREL_LO16:
+ case R_MIPS16_TLS_TPREL_LO16:
+ case R_MICROMIPS_TLS_TPREL_LO16:
+ /* These are okay in PIE, but not in a shared library. */
+ if (bfd_link_executable (info))
+ break;
+
+ /* FALLTHROUGH */
+
case R_MIPS16_HI16:
case R_MIPS_HI16:
case R_MIPS_HIGHER:
if (r_symndx == STN_UNDEF)
break;
+ /* Likewise an absolute symbol. */
+ if (h != NULL && bfd_is_abs_symbol (&h->root))
+ break;
+
/* R_MIPS_HI16 against _gp_disp is used for $gp setup,
and has a special meaning. */
if (!NEWABI_P (abfd) && h != NULL
case R_MIPS16_26:
case R_MIPS_26:
case R_MICROMIPS_26_S1:
- howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE);
- _bfd_error_handler
- /* xgettext:c-format */
- (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
- abfd, howto->name,
- (h) ? h->root.root.string : "a local symbol");
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
+ howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, NEWABI_P (abfd));
+ /* An error for unsupported relocations is raised as part
+ of the above search, so we can skip the following. */
+ if (howto != NULL)
+ info->callbacks->einfo
+ /* xgettext:c-format */
+ (_("%X%H: relocation %s against `%s' cannot be used"
+ " when making a shared object; recompile with -fPIC\n"),
+ abfd, sec, rel->r_offset, howto->name,
+ (h) ? h->root.root.string : "a local symbol");
+ break;
default:
break;
}
if (h->root.type == bfd_link_hash_undefweak)
{
- /* Do not copy relocations for undefined weak symbols with
- non-default visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ /* Do not copy relocations for undefined weak symbols that
+ we are not going to export. */
+ if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
do_copy = FALSE;
/* Make sure undefined weak symbols are output as a dynamic
/* Make sure we know what is going on here. */
BFD_ASSERT (dynobj != NULL
&& (h->needs_plt
- || h->u.weakdef != NULL
+ || h->is_weakalias
|| (h->def_dynamic
&& h->ref_regular
&& !h->def_regular)));
the symbol to the stub location. This is required to make
function pointers compare as equal between the normal
executable and the shared library. */
- if (!h->def_regular)
+ if (!h->def_regular
+ && !bfd_is_abs_section (htab->sstubs->output_section))
{
hmips->needs_lazy_stub = TRUE;
htab->lazy_stub_count++;
bfd_boolean newabi_p = NEWABI_P (info->output_bfd);
/* If this is the first symbol to need a PLT entry, then make some
- basic setup. Also work out PLT entry sizes. We'll need them
- for PLT offset calculations. */
+ basic setup. Also work out PLT entry sizes. We'll need them
+ for PLT offset calculations. */
if (htab->plt_mips_offset + htab->plt_comp_offset == 0)
{
BFD_ASSERT (htab->root.sgotplt->size == 0);
Encourage better cache usage by aligning. We do this
lazily to avoid pessimizing traditional objects. */
if (!htab->is_vxworks
- && !bfd_set_section_alignment (dynobj, htab->root.splt, 5))
+ && !bfd_set_section_alignment (htab->root.splt, 5))
return FALSE;
/* Make sure that .got.plt is word-aligned. We do this lazily
for the same reason as above. */
- if (!bfd_set_section_alignment (dynobj, htab->root.sgotplt,
+ if (!bfd_set_section_alignment (htab->root.sgotplt,
MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
return FALSE;
return FALSE;
/* There are no defined MIPS16 or microMIPS PLT entries for VxWorks,
- n32 or n64, so always use a standard entry there.
+ n32 or n64, so always use a standard entry there.
- If the symbol has a MIPS16 call stub and gets a PLT entry, then
- all MIPS16 calls will go via that stub, and there is no benefit
- to having a MIPS16 entry. And in the case of call_stub a
- standard entry actually has to be used as the stub ends with a J
- instruction. */
+ If the symbol has a MIPS16 call stub and gets a PLT entry, then
+ all MIPS16 calls will go via that stub, and there is no benefit
+ to having a MIPS16 entry. And in the case of call_stub a
+ standard entry actually has to be used as the stub ends with a J
+ instruction. */
if (newabi_p
|| htab->is_vxworks
|| hmips->call_stub
}
/* Otherwise, if there are no direct calls to the function, we
- have a free choice of whether to use standard or compressed
- entries. Prefer microMIPS entries if the object is known to
- contain microMIPS code, so that it becomes possible to create
- pure microMIPS binaries. Prefer standard entries otherwise,
- because MIPS16 ones are no smaller and are usually slower. */
+ have a free choice of whether to use standard or compressed
+ entries. Prefer microMIPS entries if the object is known to
+ contain microMIPS code, so that it becomes possible to create
+ pure microMIPS binaries. Prefer standard entries otherwise,
+ because MIPS16 ones are no smaller and are usually slower. */
if (!h->plt.plist->need_mips && !h->plt.plist->need_comp)
{
if (micromips_p)
/* If this is a weak symbol, and there is a real definition, the
processor independent code will have arranged for us to see the
real definition first, and we can just use the same value. */
- if (h->u.weakdef != NULL)
+ if (h->is_weakalias)
{
- BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
- || h->u.weakdef->root.type == bfd_link_hash_defweak);
- h->root.u.def.section = h->u.weakdef->root.u.def.section;
- h->root.u.def.value = h->u.weakdef->root.u.def.value;
+ struct elf_link_hash_entry *def = weakdef (h);
+ BFD_ASSERT (def->root.type == bfd_link_hash_defined);
+ h->root.u.def.section = def->root.u.def.section;
+ h->root.u.def.value = def->root.u.def.value;
return TRUE;
}
/* The .reginfo section has a fixed size. */
sect = bfd_get_section_by_name (output_bfd, ".reginfo");
if (sect != NULL)
- bfd_set_section_size (output_bfd, sect, sizeof (Elf32_External_RegInfo));
+ {
+ bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo));
+ sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS;
+ }
/* The .MIPS.abiflags section has a fixed size. */
sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags");
if (sect != NULL)
- bfd_set_section_size (output_bfd, sect, sizeof (Elf_External_ABIFlags_v0));
+ {
+ bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0));
+ sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS;
+ }
hti.info = info;
hti.output_bfd = output_bfd;
}
val += isa_bit;
/* For VxWorks, point at the PLT load stub rather than the lazy
- resolution stub; this stub will become the canonical function
- address. */
+ resolution stub; this stub will become the canonical function
+ address. */
if (htab->is_vxworks)
val += 8;
}
/* Figure out the size of the PLT header if we know that we
- are using it. For the sake of cache alignment always use
- a standard header whenever any standard entries are present
- even if microMIPS entries are present as well. This also
- lets the microMIPS header rely on the value of $v0 only set
- by microMIPS entries, for a small size reduction.
+ are using it. For the sake of cache alignment always use
+ a standard header whenever any standard entries are present
+ even if microMIPS entries are present as well. This also
+ lets the microMIPS header rely on the value of $v0 only set
+ by microMIPS entries, for a small size reduction.
- Set symbol table entry values for symbols that use the
- address of their PLT entry now that we can calculate it.
+ Set symbol table entry values for symbols that use the
+ address of their PLT entry now that we can calculate it.
- Also create the _PROCEDURE_LINKAGE_TABLE_ symbol if we
- haven't already in _bfd_elf_create_dynamic_sections. */
+ Also create the _PROCEDURE_LINKAGE_TABLE_ symbol if we
+ haven't already in _bfd_elf_create_dynamic_sections. */
if (htab->root.splt && htab->plt_mips_offset + htab->plt_comp_offset != 0)
{
bfd_boolean micromips_p = (MICROMIPS_P (output_bfd)
/* It's OK to base decisions on the section name, because none
of the dynobj section names depend upon the input files. */
- name = bfd_get_section_name (dynobj, s);
+ name = bfd_section_name (s);
if ((s->flags & SEC_LINKER_CREATED) == 0)
continue;
asection *target;
/* If this relocation section applies to a read only
- section, then we probably need a DT_TEXTREL entry.
- If the relocation section is .rel(a).dyn, we always
- assert a DT_TEXTREL entry rather than testing whether
- there exists a relocation to a read only section or
- not. */
- outname = bfd_get_section_name (output_bfd,
- s->output_section);
+ section, then we probably need a DT_TEXTREL entry.
+ If the relocation section is .rel(a).dyn, we always
+ assert a DT_TEXTREL entry rather than testing whether
+ there exists a relocation to a read only section or
+ not. */
+ outname = bfd_section_name (s->output_section);
target = bfd_get_section_by_name (output_bfd, outname + 4);
if ((target != NULL
&& (target->flags & SEC_READONLY) != 0
}
else
{
- if (sreldyn && sreldyn->size > 0)
+ if (sreldyn && sreldyn->size > 0
+ && !bfd_is_abs_section (sreldyn->output_section))
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_REL, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_GOTSYM, 0))
return FALSE;
+ if (info->emit_gnu_hash
+ && ! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_XHASH, 0))
+ return FALSE;
+
if (IRIX_COMPAT (dynobj) == ict_irix5
&& ! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_HIPAGENO, 0))
return FALSE;
const Elf_Internal_Rela *relend;
bfd_vma addend = 0;
bfd_boolean use_saved_addend_p = FALSE;
- const struct elf_backend_data *bed;
- bed = get_elf_backend_data (output_bfd);
- relend = relocs + input_section->reloc_count * bed->s->int_rels_per_ext_rel;
+ relend = relocs + input_section->reloc_count;
for (rel = relocs; rel < relend; ++rel)
{
const char *name;
reloc_howto_type *howto;
bfd_boolean cross_mode_jump_p = FALSE;
/* TRUE if the relocation is a RELA relocation, rather than a
- REL relocation. */
+ REL relocation. */
bfd_boolean rela_relocation_p = TRUE;
unsigned int r_type = ELF_R_TYPE (output_bfd, rel->r_info);
const char *msg;
sec);
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Can't find matching LO16 reloc against `%s'"
- " for %s at 0x%lx in section `%A'"),
+ (_("%pB: can't find matching LO16 reloc against `%s'"
+ " for %s at %#" PRIx64 " in section `%pA'"),
input_bfd, name,
- howto->name, rel->r_offset, input_section);
+ howto->name, (uint64_t) rel->r_offset, input_section);
}
}
else
/* Figure out what value we are supposed to relocate. */
switch (mips_elf_calculate_relocation (output_bfd, input_bfd,
- input_section, info, rel,
- addend, howto, local_syms,
- local_sections, &value,
- &name, &cross_mode_jump_p,
+ input_section, contents,
+ info, rel, addend, howto,
+ local_syms, local_sections,
+ &value, &name, &cross_mode_jump_p,
use_saved_addend_p))
{
case bfd_reloc_continue:
msg = NULL;
if (jal_reloc_p (howto->type))
msg = (cross_mode_jump_p
- ? _("Cannot convert a jump to JALX "
+ ? _("cannot convert a jump to JALX "
"for a non-word-aligned address")
: (howto->type == R_MIPS16_26
- ? _("Jump to a non-word-aligned address")
- : _("Jump to a non-instruction-aligned address")));
+ ? _("jump to a non-word-aligned address")
+ : _("jump to a non-instruction-aligned address")));
else if (b_reloc_p (howto->type))
msg = (cross_mode_jump_p
- ? _("Cannot convert a branch to JALX "
+ ? _("cannot convert a branch to JALX "
"for a non-word-aligned address")
- : _("Branch to a non-instruction-aligned address"));
+ : _("branch to a non-instruction-aligned address"));
else if (aligned_pcrel_reloc_p (howto->type))
msg = _("PC-relative load from unaligned address");
if (msg)
asection *s;
bfd_byte *loc;
bfd_vma offset, target, target_high, target_low;
+ bfd_vma branch_pc;
+ bfd_signed_vma pcrel_offset = 0;
stub = (struct mips_elf_la25_stub *) *slot;
hti = (struct mips_htab_traverse_info *) data;
/* Work out where in the section this stub should go. */
offset = stub->offset;
+ /* We add 8 here to account for the LUI/ADDIU instructions
+ before the branch instruction. This cannot be moved down to
+ where pcrel_offset is calculated as 's' is updated in
+ mips_elf_get_la25_target. */
+ branch_pc = s->output_section->vma + s->output_offset + offset + 8;
+
/* Work out the target address. */
target = mips_elf_get_la25_target (stub, &s);
target += s->output_section->vma + s->output_offset;
target_high = ((target + 0x8000) >> 16) & 0xffff;
target_low = (target & 0xffff);
+ /* Calculate the PC of the compact branch instruction (for the case where
+ compact branches are used for either microMIPSR6 or MIPSR6 with
+ compact branches. Add 4-bytes to account for BC using the PC of the
+ next instruction as the base. */
+ pcrel_offset = target - (branch_pc + 4);
+
if (stub->stub_section != htab->strampoline)
{
/* This is a simple LUI/ADDIU stub. Zero out the beginning
else
{
bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc);
- bfd_put_32 (hti->output_bfd, LA25_J (target), loc + 4);
- bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 8);
+ if (MIPSR6_P (hti->output_bfd) && htab->compact_branches)
+ {
+ bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 4);
+ bfd_put_32 (hti->output_bfd, LA25_BC (pcrel_offset), loc + 8);
+ }
+ else
+ {
+ bfd_put_32 (hti->output_bfd, LA25_J (target), loc + 4);
+ bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 8);
+ }
bfd_put_32 (hti->output_bfd, 0, loc + 12);
}
}
got_address_high = ((got_address + 0x8000) >> 16) & 0xffff;
got_address_low = got_address & 0xffff;
+ /* The PLT sequence is not safe for N64 if .got.plt entry's address
+ cannot be loaded in two instructions. */
+ if (ABI_64_P (output_bfd)
+ && ((got_address + 0x80008000) & ~(bfd_vma) 0xffffffff) != 0)
+ {
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%pB: `%pA' entry VMA of %#" PRIx64 " outside the 32-bit range "
+ "supported; consider using `-Ttext-segment=...'"),
+ output_bfd,
+ htab->root.sgotplt->output_section,
+ (int64_t) got_address);
+ bfd_set_error (bfd_error_no_error);
+ return FALSE;
+ }
+
/* Initially point the .got.plt entry at the PLT header. */
- loc = (htab->root.sgotplt->contents + got_index * MIPS_ELF_GOT_SIZE (dynobj));
+ loc = (htab->root.sgotplt->contents
+ + got_index * MIPS_ELF_GOT_SIZE (dynobj));
if (ABI_64_P (output_bfd))
bfd_put_64 (output_bfd, header_address, loc);
else
bfd_put_32 (output_bfd, header_address, loc);
/* Now handle the PLT itself. First the standard entry (the order
- does not matter, we just have to pick one). */
+ does not matter, we just have to pick one). */
if (h->plt.plist->mips_offset != MINUS_ONE)
{
const bfd_vma *plt_entry;
/* Fill in the PLT entry itself. */
if (MIPSR6_P (output_bfd))
- plt_entry = mipsr6_exec_plt_entry;
+ plt_entry = htab->compact_branches ? mipsr6_exec_plt_entry_compact
+ : mipsr6_exec_plt_entry;
else
plt_entry = mips_exec_plt_entry;
bfd_put_32 (output_bfd, plt_entry[0] | got_address_high, loc);
bfd_put_32 (output_bfd, plt_entry[1] | got_address_low | load,
loc + 4);
- if (! LOAD_INTERLOCKS_P (output_bfd))
+ if (! LOAD_INTERLOCKS_P (output_bfd)
+ || (MIPSR6_P (output_bfd) && htab->compact_branches))
{
bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 8);
bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: `%A' offset of %ld from `%A' "
+ (_("%pB: `%pA' offset of %" PRId64 " from `%pA' "
"beyond the range of ADDIUPC"),
output_bfd,
htab->root.sgotplt->output_section,
- (long) gotpc_offset,
+ (int64_t) gotpc_offset,
htab->root.splt->output_section);
bfd_set_error (bfd_error_no_error);
return FALSE;
stub + idx);
idx += 4;
}
- bfd_put_32 (output_bfd, STUB_JALR, stub + idx);
- idx += 4;
+
+ if (!(MIPSR6_P (output_bfd) && htab->compact_branches))
+ {
+ bfd_put_32 (output_bfd, STUB_JALR, stub + idx);
+ idx += 4;
+ }
/* If a large stub is not required and sign extension is not a
problem, then use legacy code in the stub. */
else
bfd_put_32 (output_bfd, STUB_LI16S (output_bfd, h->dynindx),
stub + idx);
+ idx += 4;
+
+ if (MIPSR6_P (output_bfd) && htab->compact_branches)
+ bfd_put_32 (output_bfd, STUB_JALRC, stub + idx);
}
BFD_ASSERT (h->plt.plist->stub_offset <= htab->sstubs->size);
sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION);
sym->st_value = 1;
}
- else if (strcmp (name, "_gp_disp") == 0 && ! NEWABI_P (output_bfd))
- {
- sym->st_shndx = SHN_ABS;
- sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION);
- sym->st_value = elf_gp (output_bfd);
- }
else if (SGI_COMPAT (output_bfd))
{
if (strcmp (name, mips_elf_dynsym_rtproc_names[0]) == 0
BFD_ASSERT (htab != NULL);
if (ABI_64_P (output_bfd))
- plt_entry = mips_n64_exec_plt0_entry;
+ plt_entry = (htab->compact_branches
+ ? mipsr6_n64_exec_plt0_entry_compact
+ : mips_n64_exec_plt0_entry);
else if (ABI_N32_P (output_bfd))
- plt_entry = mips_n32_exec_plt0_entry;
+ plt_entry = (htab->compact_branches
+ ? mipsr6_n32_exec_plt0_entry_compact
+ : mips_n32_exec_plt0_entry);
else if (!htab->plt_header_is_comp)
- plt_entry = mips_o32_exec_plt0_entry;
+ plt_entry = (htab->compact_branches
+ ? mipsr6_o32_exec_plt0_entry_compact
+ : mips_o32_exec_plt0_entry);
else if (htab->insn32)
plt_entry = micromips_insn32_o32_exec_plt0_entry;
else
/* The PLT sequence is not safe for N64 if .got.plt's address can
not be loaded in two instructions. */
- BFD_ASSERT ((gotplt_value & ~(bfd_vma) 0x7fffffff) == 0
- || ~(gotplt_value | 0x7fffffff) == 0);
+ if (ABI_64_P (output_bfd)
+ && ((gotplt_value + 0x80008000) & ~(bfd_vma) 0xffffffff) != 0)
+ {
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%pB: `%pA' start VMA of %#" PRIx64 " outside the 32-bit range "
+ "supported; consider using `-Ttext-segment=...'"),
+ output_bfd,
+ htab->root.sgotplt->output_section,
+ (int64_t) gotplt_value);
+ bfd_set_error (bfd_error_no_error);
+ return FALSE;
+ }
/* Install the PLT header. */
loc = htab->root.splt->contents;
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: `%A' offset of %ld from `%A' beyond the range of ADDIUPC"),
+ (_("%pB: `%pA' offset of %" PRId64 " from `%pA' "
+ "beyond the range of ADDIUPC"),
output_bfd,
htab->root.sgotplt->output_section,
- (long) gotpc_offset,
+ (int64_t) gotpc_offset,
htab->root.splt->output_section);
bfd_set_error (bfd_error_no_error);
return FALSE;
swap_out_p = FALSE;
break;
+ case DT_MIPS_XHASH:
+ name = ".MIPS.xhash";
+ s = bfd_get_linker_section (dynobj, name);
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
+ break;
+
default:
swap_out_p = FALSE;
if (htab->is_vxworks
: sizeof (Elf32_External_Rel)));
/* Adjust the section size too. Tools like the prelinker
can reasonably expect the values to the same. */
+ BFD_ASSERT (!bfd_is_abs_section (s->output_section));
elf_section_data (s->output_section)->this_hdr.sh_size
= dyn.d_un.d_val;
break;
switch (bfd_get_mach (abfd))
{
default:
+ if (ABI_N32_P (abfd) || ABI_64_P (abfd))
+ val = E_MIPS_ARCH_3;
+ else
+ val = E_MIPS_ARCH_1;
+ break;
+
case bfd_mach_mips3000:
val = E_MIPS_ARCH_1;
break;
val = E_MIPS_ARCH_2;
break;
+ case bfd_mach_mips4010:
+ val = E_MIPS_ARCH_2 | E_MIPS_MACH_4010;
+ break;
+
case bfd_mach_mips4000:
case bfd_mach_mips4300:
case bfd_mach_mips4400:
val = E_MIPS_ARCH_3;
break;
- case bfd_mach_mips4010:
- val = E_MIPS_ARCH_3 | E_MIPS_MACH_4010;
- break;
-
case bfd_mach_mips4100:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4100;
break;
val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
break;
- case bfd_mach_mips_loongson_3a:
- val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_LS3A;
+ case bfd_mach_mips_gs464:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS464;
+ break;
+
+ case bfd_mach_mips_gs464e:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS464E;
+ break;
+
+ case bfd_mach_mips_gs264e:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS264E;
break;
case bfd_mach_mips_octeon:
val = E_MIPS_ARCH_32R2;
break;
+ case bfd_mach_mips_interaptiv_mr2:
+ val = E_MIPS_ARCH_32R2 | E_MIPS_MACH_IAMR2;
+ break;
+
case bfd_mach_mipsisa64r2:
case bfd_mach_mipsisa64r3:
case bfd_mach_mipsisa64r5:
number. This is used by both the 32-bit and the 64-bit ABI. */
void
-_bfd_mips_elf_final_write_processing (bfd *abfd,
- bfd_boolean linker ATTRIBUTE_UNUSED)
+_bfd_mips_final_write_processing (bfd *abfd)
{
unsigned int i;
Elf_Internal_Shdr **hdrpp;
case SHT_MIPS_GPTAB:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
- name = bfd_get_section_name (abfd, (*hdrpp)->bfd_section);
+ name = bfd_section_name ((*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL
&& CONST_STRNEQ (name, ".gptab."));
sec = bfd_get_section_by_name (abfd, name + sizeof ".gptab" - 1);
case SHT_MIPS_CONTENT:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
- name = bfd_get_section_name (abfd, (*hdrpp)->bfd_section);
+ name = bfd_section_name ((*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL
&& CONST_STRNEQ (name, ".MIPS.content"));
sec = bfd_get_section_by_name (abfd,
case SHT_MIPS_EVENTS:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
- name = bfd_get_section_name (abfd, (*hdrpp)->bfd_section);
+ name = bfd_section_name ((*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL);
if (CONST_STRNEQ (name, ".MIPS.events"))
sec = bfd_get_section_by_name (abfd,
(*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
break;
+ case SHT_MIPS_XHASH:
+ sec = bfd_get_section_by_name (abfd, ".dynsym");
+ if (sec != NULL)
+ (*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
}
}
}
+
+bfd_boolean
+_bfd_mips_elf_final_write_processing (bfd *abfd)
+{
+ _bfd_mips_final_write_processing (abfd);
+ return _bfd_elf_final_write_processing (abfd);
+}
\f
/* When creating an IRIX5 executable, we need REGINFO and RTPROC
segments. */
{
asection *s;
struct elf_segment_map *m, **pm;
- bfd_size_type amt;
+ size_t amt;
/* If there is a .reginfo section, we need a PT_MIPS_REGINFO
segment. */
&& s->vma + s->size <= high)
++c;
- amt = sizeof *n + (bfd_size_type) (c - 1) * sizeof (asection *);
+ amt = sizeof *n - sizeof (asection *) + c * sizeof (asection *);
n = bfd_zalloc (abfd, amt);
if (n == NULL)
return FALSE;
return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
}
-/* Update the got entry reference counts for the section being removed. */
-
-bfd_boolean
-_bfd_mips_elf_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
- struct bfd_link_info *info ATTRIBUTE_UNUSED,
- asection *sec ATTRIBUTE_UNUSED,
- const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
-{
-#if 0
- Elf_Internal_Shdr *symtab_hdr;
- struct elf_link_hash_entry **sym_hashes;
- bfd_signed_vma *local_got_refcounts;
- const Elf_Internal_Rela *rel, *relend;
- unsigned long r_symndx;
- struct elf_link_hash_entry *h;
-
- if (bfd_link_relocatable (info))
- return TRUE;
-
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- sym_hashes = elf_sym_hashes (abfd);
- local_got_refcounts = elf_local_got_refcounts (abfd);
-
- relend = relocs + sec->reloc_count;
- for (rel = relocs; rel < relend; rel++)
- switch (ELF_R_TYPE (abfd, rel->r_info))
- {
- case R_MIPS16_GOT16:
- case R_MIPS16_CALL16:
- case R_MIPS_GOT16:
- case R_MIPS_CALL16:
- case R_MIPS_CALL_HI16:
- case R_MIPS_CALL_LO16:
- case R_MIPS_GOT_HI16:
- case R_MIPS_GOT_LO16:
- case R_MIPS_GOT_DISP:
- case R_MIPS_GOT_PAGE:
- case R_MIPS_GOT_OFST:
- case R_MICROMIPS_GOT16:
- case R_MICROMIPS_CALL16:
- case R_MICROMIPS_CALL_HI16:
- case R_MICROMIPS_CALL_LO16:
- case R_MICROMIPS_GOT_HI16:
- case R_MICROMIPS_GOT_LO16:
- case R_MICROMIPS_GOT_DISP:
- case R_MICROMIPS_GOT_PAGE:
- case R_MICROMIPS_GOT_OFST:
- /* ??? It would seem that the existing MIPS code does no sort
- of reference counting or whatnot on its GOT and PLT entries,
- so it is not possible to garbage collect them at this time. */
- break;
-
- default:
- break;
- }
-#endif
-
- return TRUE;
-}
-
/* Prevent .MIPS.abiflags from being discarded with --gc-sections. */
bfd_boolean
for (o = sub->sections; o != NULL; o = o->next)
if (!o->gc_mark
- && MIPS_ELF_ABIFLAGS_SECTION_NAME_P
- (bfd_get_section_name (sub, o)))
+ && MIPS_ELF_ABIFLAGS_SECTION_NAME_P (bfd_section_name (o)))
{
if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
return FALSE;
if (indmips->has_nonpic_branches)
dirmips->has_nonpic_branches = TRUE;
}
+
+/* Take care of the special `__gnu_absolute_zero' symbol and ignore attempts
+ to hide it. It has to remain global (it will also be protected) so as to
+ be assigned a global GOT entry, which will then remain unchanged at load
+ time. */
+
+void
+_bfd_mips_elf_hide_symbol (struct bfd_link_info *info,
+ struct elf_link_hash_entry *entry,
+ bfd_boolean force_local)
+{
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+ if (htab->use_absolute_zero
+ && strcmp (entry->root.root.string, "__gnu_absolute_zero") == 0)
+ return;
+
+ _bfd_elf_link_hash_hide_symbol (info, entry, force_local);
+}
\f
#define PDR_SIZE 32
bfd_boolean
_bfd_mips_elf_write_section (bfd *output_bfd,
struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
- asection *sec, bfd_byte *contents)
+ asection *sec, bfd_byte *contents)
{
bfd_byte *to, *from, *end;
int i;
filename_ptr, functionname_ptr,
line_ptr, discriminator_ptr,
dwarf_debug_sections,
- ABI_64_P (abfd) ? 8 : 0,
- &elf_tdata (abfd)->dwarf2_find_line_info))
+ &elf_tdata (abfd)->dwarf2_find_line_info)
+ == 1)
return TRUE;
if (_bfd_dwarf1_find_nearest_line (abfd, symbols, section, offset,
filename_ptr, functionname_ptr,
line_ptr))
- return TRUE;
+ {
+ if (!*functionname_ptr)
+ _bfd_elf_find_function (abfd, symbols, section, offset,
+ *filename_ptr ? NULL : filename_ptr,
+ functionname_ptr);
+ return TRUE;
+ }
msec = bfd_get_section_by_name (abfd, ".mdebug");
if (msec != NULL)
mips_elf_tdata (abfd)->find_line_info = fi;
/* Note that we don't bother to ever free this information.
- find_nearest_line is either called all the time, as in
- objdump -l, so the information should be saved, or it is
- rarely called, as in ld error messages, so the memory
- wasted is unimportant. Still, it would probably be a
- good idea for free_cached_info to throw it away. */
+ find_nearest_line is either called all the time, as in
+ objdump -l, so the information should be saved, or it is
+ rarely called, as in ld error messages, so the memory
+ wasted is unimportant. Still, it would probably be a
+ good idea for free_cached_info to throw it away. */
}
if (_bfd_ecoff_locate_line (abfd, section, offset, &fi->d, swap,
if (elf_section_data (section) == NULL)
{
- bfd_size_type amt = sizeof (struct bfd_elf_section_data);
+ size_t amt = sizeof (struct bfd_elf_section_data);
section->used_by_bfd = bfd_zalloc (abfd, amt);
if (elf_section_data (section) == NULL)
return FALSE;
free (reloc_vector);
return data;
-error_return:
+ error_return:
if (reloc_vector != NULL)
free (reloc_vector);
return NULL;
int fndopc;
/* The number of bytes to delete for relaxation and from where
- to delete these bytes starting at irel->r_offset. */
+ to delete these bytes starting at irel->r_offset. */
int delcnt = 0;
int deloff = 0;
/* If this isn't something that can be relaxed, then ignore
- this reloc. */
+ this reloc. */
if (r_type != R_MICROMIPS_HI16
&& r_type != R_MICROMIPS_PC16_S1
&& r_type != R_MICROMIPS_26_S1)
/* For simplicity of coding, we are going to modify the
- section contents, the section relocs, and the BFD symbol
- table. We must tell the rest of the code not to free up this
- information. It would be possible to instead create a table
- of changes which have to be made, as is done in coff-mips.c;
- that would be more work, but would require less memory when
- the linker is run. */
+ section contents, the section relocs, and the BFD symbol
+ table. We must tell the rest of the code not to free up this
+ information. It would be possible to instead create a table
+ of changes which have to be made, as is done in coff-mips.c;
+ that would be more work, but would require less memory when
+ the linker is run. */
/* Only 32-bit instructions relaxed. */
if (irel->r_offset + 4 > sec->size)
opcode = bfd_get_micromips_32 (abfd, ptr);
/* This is the pc-relative distance from the instruction the
- relocation is applied to, to the symbol referred. */
+ relocation is applied to, to the symbol referred. */
pcrval = (symval
- (sec->output_section->vma + sec->output_offset)
- irel->r_offset);
/* R_MICROMIPS_HI16 / LUI relaxation to nil, performing relaxation
- of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or
- R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is
+ of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or
+ R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is
- (symval % 4 == 0 && IS_BITSIZE (pcrval, 25))
+ (symval % 4 == 0 && IS_BITSIZE (pcrval, 25))
- where pcrval has first to be adjusted to apply against the LO16
- location (we make the adjustment later on, when we have figured
- out the offset). */
+ where pcrval has first to be adjusted to apply against the LO16
+ location (we make the adjustment later on, when we have figured
+ out the offset). */
if (r_type == R_MICROMIPS_HI16 && MATCH (opcode, lui_insn))
{
bfd_boolean bzc = FALSE;
irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_HI0_LO16);
/* Instructions using R_MICROMIPS_LO16 have the base or
- source register in bits 20:16. This register becomes $0
- (zero) as the result of the R_MICROMIPS_HI16 being 0. */
+ source register in bits 20:16. This register becomes $0
+ (zero) as the result of the R_MICROMIPS_HI16 being 0. */
nextopc &= ~0x001f0000;
bfd_put_16 (abfd, (nextopc >> 16) & 0xffff,
contents + irel[1].r_offset);
}
/* Compact branch relaxation -- due to the multitude of macros
- employed by the compiler/assembler, compact branches are not
- always generated. Obviously, this can/will be fixed elsewhere,
- but there is no drawback in double checking it here. */
+ employed by the compiler/assembler, compact branches are not
+ always generated. Obviously, this can/will be fixed elsewhere,
+ but there is no drawback in double checking it here. */
else if (r_type == R_MICROMIPS_PC16_S1
&& irel->r_offset + 5 < sec->size
&& ((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0
}
/* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC10_S1. We need
- to check the distance from the next instruction, so subtract 2. */
+ to check the distance from the next instruction, so subtract 2. */
else if (!insn32
&& r_type == R_MICROMIPS_PC16_S1
&& IS_BITSIZE (pcrval - 2, 11)
}
/* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC7_S1. We need
- to check the distance from the next instruction, so subtract 2. */
+ to check the distance from the next instruction, so subtract 2. */
else if (!insn32
&& r_type == R_MICROMIPS_PC16_S1
&& IS_BITSIZE (pcrval - 2, 8)
if (relaxed)
{
/* JAL with 32-bit delay slot that is changed to a JALS
- with 16-bit delay slot. */
+ with 16-bit delay slot. */
bfd_put_micromips_32 (abfd, jal_insn_32_bd16.match, ptr);
/* Delete 2 bytes from irel->r_offset + 6. */
_bfd_mips_elf_link_hash_table_create (bfd *abfd)
{
struct mips_elf_link_hash_table *ret;
- bfd_size_type amt = sizeof (struct mips_elf_link_hash_table);
+ size_t amt = sizeof (struct mips_elf_link_hash_table);
ret = bfd_zmalloc (amt);
if (ret == NULL)
/* A function that the linker calls to select between all or only
32-bit microMIPS instructions, and between making or ignoring
- branch relocation checks for invalid transitions between ISA modes. */
+ branch relocation checks for invalid transitions between ISA modes.
+ Also record whether we have been configured for a GNU target. */
void
_bfd_mips_elf_linker_flags (struct bfd_link_info *info, bfd_boolean insn32,
- bfd_boolean ignore_branch_isa)
+ bfd_boolean ignore_branch_isa,
+ bfd_boolean gnu_target)
{
mips_elf_hash_table (info)->insn32 = insn32;
mips_elf_hash_table (info)->ignore_branch_isa = ignore_branch_isa;
+ mips_elf_hash_table (info)->gnu_target = gnu_target;
+}
+
+/* A function that the linker calls to enable use of compact branches in
+ linker generated code for MIPSR6. */
+
+void
+_bfd_mips_elf_compact_branches (struct bfd_link_info *info, bfd_boolean on)
+{
+ mips_elf_hash_table (info)->compact_branches = on;
}
+
\f
/* Structure for saying that BFD machine EXTENSION extends BASE. */
{ bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
{ bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
- { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 },
+ { bfd_mach_mips_gs264e, bfd_mach_mips_gs464e },
+ { bfd_mach_mips_gs464e, bfd_mach_mips_gs464 },
+ { bfd_mach_mips_gs464, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
{ bfd_mach_mips4400, bfd_mach_mips4000 },
{ bfd_mach_mips4300, bfd_mach_mips4000 },
{ bfd_mach_mips4100, bfd_mach_mips4000 },
- { bfd_mach_mips4010, bfd_mach_mips4000 },
{ bfd_mach_mips5900, bfd_mach_mips4000 },
+ /* MIPS32r3 extensions. */
+ { bfd_mach_mips_interaptiv_mr2, bfd_mach_mipsisa32r3 },
+
+ /* MIPS32r2 extensions. */
+ { bfd_mach_mipsisa32r3, bfd_mach_mipsisa32r2 },
+
/* MIPS32 extensions. */
{ bfd_mach_mipsisa32r2, bfd_mach_mipsisa32 },
/* MIPS II extensions. */
{ bfd_mach_mips4000, bfd_mach_mips6000 },
{ bfd_mach_mipsisa32, bfd_mach_mips6000 },
+ { bfd_mach_mips4010, bfd_mach_mips6000 },
/* MIPS I extensions. */
{ bfd_mach_mips6000, bfd_mach_mips3000 },
{
switch (isa_ext)
{
- case AFL_EXT_3900: return bfd_mach_mips3900;
- case AFL_EXT_4010: return bfd_mach_mips4010;
- case AFL_EXT_4100: return bfd_mach_mips4100;
- case AFL_EXT_4111: return bfd_mach_mips4111;
- case AFL_EXT_4120: return bfd_mach_mips4120;
- case AFL_EXT_4650: return bfd_mach_mips4650;
- case AFL_EXT_5400: return bfd_mach_mips5400;
- case AFL_EXT_5500: return bfd_mach_mips5500;
- case AFL_EXT_5900: return bfd_mach_mips5900;
- case AFL_EXT_10000: return bfd_mach_mips10000;
+ case AFL_EXT_3900: return bfd_mach_mips3900;
+ case AFL_EXT_4010: return bfd_mach_mips4010;
+ case AFL_EXT_4100: return bfd_mach_mips4100;
+ case AFL_EXT_4111: return bfd_mach_mips4111;
+ case AFL_EXT_4120: return bfd_mach_mips4120;
+ case AFL_EXT_4650: return bfd_mach_mips4650;
+ case AFL_EXT_5400: return bfd_mach_mips5400;
+ case AFL_EXT_5500: return bfd_mach_mips5500;
+ case AFL_EXT_5900: return bfd_mach_mips5900;
+ case AFL_EXT_10000: return bfd_mach_mips10000;
case AFL_EXT_LOONGSON_2E: return bfd_mach_mips_loongson_2e;
case AFL_EXT_LOONGSON_2F: return bfd_mach_mips_loongson_2f;
- case AFL_EXT_LOONGSON_3A: return bfd_mach_mips_loongson_3a;
- case AFL_EXT_SB1: return bfd_mach_mips_sb1;
+ case AFL_EXT_SB1: return bfd_mach_mips_sb1;
case AFL_EXT_OCTEON: return bfd_mach_mips_octeon;
case AFL_EXT_OCTEONP: return bfd_mach_mips_octeonp;
case AFL_EXT_OCTEON2: return bfd_mach_mips_octeon2;
- case AFL_EXT_XLR: return bfd_mach_mips_xlr;
- default: return bfd_mach_mips3000;
+ case AFL_EXT_XLR: return bfd_mach_mips_xlr;
+ default: return bfd_mach_mips3000;
}
}
{
switch (bfd_get_mach (abfd))
{
- case bfd_mach_mips3900: return AFL_EXT_3900;
- case bfd_mach_mips4010: return AFL_EXT_4010;
- case bfd_mach_mips4100: return AFL_EXT_4100;
- case bfd_mach_mips4111: return AFL_EXT_4111;
- case bfd_mach_mips4120: return AFL_EXT_4120;
- case bfd_mach_mips4650: return AFL_EXT_4650;
- case bfd_mach_mips5400: return AFL_EXT_5400;
- case bfd_mach_mips5500: return AFL_EXT_5500;
- case bfd_mach_mips5900: return AFL_EXT_5900;
- case bfd_mach_mips10000: return AFL_EXT_10000;
+ case bfd_mach_mips3900: return AFL_EXT_3900;
+ case bfd_mach_mips4010: return AFL_EXT_4010;
+ case bfd_mach_mips4100: return AFL_EXT_4100;
+ case bfd_mach_mips4111: return AFL_EXT_4111;
+ case bfd_mach_mips4120: return AFL_EXT_4120;
+ case bfd_mach_mips4650: return AFL_EXT_4650;
+ case bfd_mach_mips5400: return AFL_EXT_5400;
+ case bfd_mach_mips5500: return AFL_EXT_5500;
+ case bfd_mach_mips5900: return AFL_EXT_5900;
+ case bfd_mach_mips10000: return AFL_EXT_10000;
case bfd_mach_mips_loongson_2e: return AFL_EXT_LOONGSON_2E;
case bfd_mach_mips_loongson_2f: return AFL_EXT_LOONGSON_2F;
- case bfd_mach_mips_loongson_3a: return AFL_EXT_LOONGSON_3A;
- case bfd_mach_mips_sb1: return AFL_EXT_SB1;
- case bfd_mach_mips_octeon: return AFL_EXT_OCTEON;
- case bfd_mach_mips_octeonp: return AFL_EXT_OCTEONP;
- case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3;
- case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2;
- case bfd_mach_mips_xlr: return AFL_EXT_XLR;
- default: return 0;
+ case bfd_mach_mips_sb1: return AFL_EXT_SB1;
+ case bfd_mach_mips_octeon: return AFL_EXT_OCTEON;
+ case bfd_mach_mips_octeonp: return AFL_EXT_OCTEONP;
+ case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3;
+ case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2;
+ case bfd_mach_mips_xlr: return AFL_EXT_XLR;
+ case bfd_mach_mips_interaptiv_mr2:
+ return AFL_EXT_INTERAPTIV_MR2;
+ default: return 0;
}
}
default:
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: Unknown architecture %s"),
+ (_("%pB: unknown architecture %s"),
abfd, bfd_printable_name (abfd));
}
&& abiflags->fp_abi != Val_GNU_MIPS_ABI_FP_SOFT
&& abiflags->fp_abi != Val_GNU_MIPS_ABI_FP_64A
&& abiflags->isa_level >= 32
- && abiflags->isa_ext != AFL_EXT_LOONGSON_3A)
+ && abiflags->ases != AFL_ASE_LOONGSON_EXT)
abiflags->flags1 |= AFL_FLAGS1_ODDSPREG;
}
scRData, scSData, scSBss, scBss
};
- /* Sort the dynamic symbols so that those with GOT entries come after
- those without. */
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
+ /* Sort the dynamic symbols so that those with GOT entries come after
+ those without. */
if (!mips_elf_sort_hash_table (abfd, info))
return FALSE;
bfd *input_bfd;
Elf32_External_RegInfo ext;
Elf32_RegInfo sub;
+ bfd_size_type sz;
if (p->type != bfd_indirect_link_order)
{
input_section = p->u.indirect.section;
input_bfd = input_section->owner;
+ sz = (input_section->size < sizeof (ext)
+ ? input_section->size : sizeof (ext));
+ memset (&ext, 0, sizeof (ext));
if (! bfd_get_section_contents (input_bfd, input_section,
- &ext, 0, sizeof ext))
+ &ext, 0, sz))
return FALSE;
bfd_mips_elf32_swap_reginfo_in (input_bfd, &ext, &sub);
reginfo.ri_cprmask[3] |= sub.ri_cprmask[3];
/* ri_gp_value is set by the function
- mips_elf32_section_processing when the section is
+ `_bfd_mips_elf_section_processing' when the section is
finally written out. */
/* Hack: reset the SEC_HAS_CONTENTS flag so that
".rtproc",
flags);
if (rtproc_sec == NULL
- || ! bfd_set_section_alignment (abfd, rtproc_sec, 4))
+ || !bfd_set_section_alignment (rtproc_sec, 4))
return FALSE;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: illegal section name `%A'"), abfd, o);
+ (_("%pB: illegal section name `%pA'"), abfd, o);
bfd_set_error (bfd_error_nonrepresentable_section);
return FALSE;
}
!= ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0))
{
_bfd_error_handler
- (_("%B: warning: linking abicalls files with non-abicalls files"),
+ (_("%pB: warning: linking abicalls files with non-abicalls files"),
ibfd);
ok = TRUE;
}
if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags))
{
_bfd_error_handler
- (_("%B: linking 32-bit code with 64-bit code"),
+ (_("%pB: linking 32-bit code with 64-bit code"),
ibfd);
ok = FALSE;
}
/* The ISAs aren't compatible. */
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: linking %s module with previous %s modules"),
+ (_("%pB: linking %s module with previous %s modules"),
ibfd,
bfd_printable_name (ibfd),
bfd_printable_name (obfd));
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: ABI mismatch: linking %s module with previous %s modules"),
+ (_("%pB: ABI mismatch: linking %s module with previous %s modules"),
ibfd,
elf_mips_abi_name (ibfd),
elf_mips_abi_name (obfd));
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B: ASE mismatch: linking %s module with previous %s modules"),
+ (_("%pB: ASE mismatch: linking %s module with previous %s modules"),
ibfd,
m16_mis ? "MIPS16" : "microMIPS",
m16_mis ? "microMIPS" : "MIPS16");
if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008))
{
/* xgettext:c-format */
- _bfd_error_handler (_("%B: linking %s module with previous %s modules"),
+ _bfd_error_handler (_("%pB: linking %s module with previous %s modules"),
ibfd,
(new_flags & EF_MIPS_NAN2008
? "-mnan=2008" : "-mnan=legacy"),
if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64))
{
/* xgettext:c-format */
- _bfd_error_handler (_("%B: linking %s module with previous %s modules"),
+ _bfd_error_handler (_("%pB: linking %s module with previous %s modules"),
ibfd,
(new_flags & EF_MIPS_FP64
? "-mfp64" : "-mfp32"),
{
/* xgettext:c-format */
_bfd_error_handler
- (_("%B: uses different e_flags (0x%lx) fields than previous modules "
- "(0x%lx)"),
- ibfd, (unsigned long) new_flags,
- (unsigned long) old_flags);
+ (_("%pB: uses different e_flags (%#x) fields than previous modules "
+ "(%#x)"),
+ ibfd, new_flags, old_flags);
ok = FALSE;
}
if (!out_string && !in_string)
/* xgettext:c-format */
_bfd_error_handler
- (_("Warning: %B uses unknown floating point ABI %d "
- "(set by %B), %B uses unknown floating point ABI %d"),
+ (_("warning: %pB uses unknown floating point ABI %d "
+ "(set by %pB), %pB uses unknown floating point ABI %d"),
obfd, out_fp, abi_fp_bfd, ibfd, in_fp);
else if (!out_string)
_bfd_error_handler
/* xgettext:c-format */
- (_("Warning: %B uses unknown floating point ABI %d "
- "(set by %B), %B uses %s"),
+ (_("warning: %pB uses unknown floating point ABI %d "
+ "(set by %pB), %pB uses %s"),
obfd, out_fp, abi_fp_bfd, ibfd, in_string);
else if (!in_string)
_bfd_error_handler
/* xgettext:c-format */
- (_("Warning: %B uses %s (set by %B), "
- "%B uses unknown floating point ABI %d"),
+ (_("warning: %pB uses %s (set by %pB), "
+ "%pB uses unknown floating point ABI %d"),
obfd, out_string, abi_fp_bfd, ibfd, in_fp);
else
{
in_string = "-mhard-float";
_bfd_error_handler
/* xgettext:c-format */
- (_("Warning: %B uses %s (set by %B), %B uses %s"),
+ (_("warning: %pB uses %s (set by %pB), %pB uses %s"),
obfd, out_string, abi_fp_bfd, ibfd, in_string);
}
}
case Val_GNU_MIPS_ABI_MSA_128:
_bfd_error_handler
/* xgettext:c-format */
- (_("Warning: %B uses %s (set by %B), "
- "%B uses unknown MSA ABI %d"),
+ (_("warning: %pB uses %s (set by %pB), "
+ "%pB uses unknown MSA ABI %d"),
obfd, "-mmsa", abi_msa_bfd,
ibfd, in_attr[Tag_GNU_MIPS_ABI_MSA].i);
break;
case Val_GNU_MIPS_ABI_MSA_128:
_bfd_error_handler
/* xgettext:c-format */
- (_("Warning: %B uses unknown MSA ABI %d "
- "(set by %B), %B uses %s"),
+ (_("warning: %pB uses unknown MSA ABI %d "
+ "(set by %pB), %pB uses %s"),
obfd, out_attr[Tag_GNU_MIPS_ABI_MSA].i,
abi_msa_bfd, ibfd, "-mmsa");
break;
default:
_bfd_error_handler
/* xgettext:c-format */
- (_("Warning: %B uses unknown MSA ABI %d "
- "(set by %B), %B uses unknown MSA ABI %d"),
+ (_("warning: %pB uses unknown MSA ABI %d "
+ "(set by %pB), %pB uses unknown MSA ABI %d"),
obfd, out_attr[Tag_GNU_MIPS_ABI_MSA].i,
abi_msa_bfd, ibfd, in_attr[Tag_GNU_MIPS_ABI_MSA].i);
break;
if (! _bfd_generic_verify_endian_match (ibfd, info))
{
_bfd_error_handler
- (_("%B: endianness incompatible with that of the selected emulation"),
+ (_("%pB: endianness incompatible with that of the selected emulation"),
ibfd);
return FALSE;
}
if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0)
{
_bfd_error_handler
- (_("%B: ABI is incompatible with that of the selected emulation"),
+ (_("%pB: ABI is incompatible with that of the selected emulation"),
ibfd);
return FALSE;
}
Elf_Internal_ABIFlags_v0 abiflags;
/* Set up the FP ABI attribute from the abiflags if it is not already
- set. */
+ set. */
if (in_attr[Tag_GNU_MIPS_ABI_FP].i == Val_GNU_MIPS_ABI_FP_ANY)
- in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi;
+ in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi;
infer_mips_abiflags (ibfd, &abiflags);
in_abiflags = in_tdata->abiflags;
/* It is not possible to infer the correct ISA revision
- for R3 or R5 so drop down to R2 for the checks. */
+ for R3 or R5 so drop down to R2 for the checks. */
if (in_abiflags.isa_rev == 3 || in_abiflags.isa_rev == 5)
in_abiflags.isa_rev = 2;
if (LEVEL_REV (in_abiflags.isa_level, in_abiflags.isa_rev)
< LEVEL_REV (abiflags.isa_level, abiflags.isa_rev))
_bfd_error_handler
- (_("%B: warning: Inconsistent ISA between e_flags and "
+ (_("%pB: warning: inconsistent ISA between e_flags and "
".MIPS.abiflags"), ibfd);
if (abiflags.fp_abi != Val_GNU_MIPS_ABI_FP_ANY
&& in_abiflags.fp_abi != abiflags.fp_abi)
_bfd_error_handler
- (_("%B: warning: Inconsistent FP ABI between .gnu.attributes and "
+ (_("%pB: warning: inconsistent FP ABI between .gnu.attributes and "
".MIPS.abiflags"), ibfd);
if ((in_abiflags.ases & abiflags.ases) != abiflags.ases)
_bfd_error_handler
- (_("%B: warning: Inconsistent ASEs between e_flags and "
+ (_("%pB: warning: inconsistent ASEs between e_flags and "
".MIPS.abiflags"), ibfd);
/* The isa_ext is allowed to be an extension of what can be inferred
from e_flags. */
if (!mips_mach_extends_p (bfd_mips_isa_ext_mach (abiflags.isa_ext),
bfd_mips_isa_ext_mach (in_abiflags.isa_ext)))
_bfd_error_handler
- (_("%B: warning: Inconsistent ISA extensions between e_flags and "
+ (_("%pB: warning: inconsistent ISA extensions between e_flags and "
".MIPS.abiflags"), ibfd);
if (in_abiflags.flags2 != 0)
_bfd_error_handler
- (_("%B: warning: Unexpected flag in the flags2 field of "
+ (_("%pB: warning: unexpected flag in the flags2 field of "
".MIPS.abiflags (0x%lx)"), ibfd,
- (unsigned long) in_abiflags.flags2);
+ in_abiflags.flags2);
}
else
{
return "DT_MIPS_PLTGOT";
case DT_MIPS_RWPLT:
return "DT_MIPS_RWPLT";
+ case DT_MIPS_XHASH:
+ return "DT_MIPS_XHASH";
}
}
fputs ("\n\tMICROMIPS ASE", file);
if (mask & AFL_ASE_XPA)
fputs ("\n\tXPA ASE", file);
+ if (mask & AFL_ASE_MIPS16E2)
+ fputs ("\n\tMIPS16e2 ASE", file);
+ if (mask & AFL_ASE_CRC)
+ fputs ("\n\tCRC ASE", file);
+ if (mask & AFL_ASE_GINV)
+ fputs ("\n\tGINV ASE", file);
+ if (mask & AFL_ASE_LOONGSON_MMI)
+ fputs ("\n\tLoongson MMI ASE", file);
+ if (mask & AFL_ASE_LOONGSON_CAM)
+ fputs ("\n\tLoongson CAM ASE", file);
+ if (mask & AFL_ASE_LOONGSON_EXT)
+ fputs ("\n\tLoongson EXT ASE", file);
+ if (mask & AFL_ASE_LOONGSON_EXT2)
+ fputs ("\n\tLoongson EXT2 ASE", file);
if (mask == 0)
fprintf (file, "\n\t%s", _("None"));
else if ((mask & ~AFL_ASE_MASK) != 0)
case AFL_EXT_OCTEONP:
fputs ("Cavium Networks OcteonP", file);
break;
- case AFL_EXT_LOONGSON_3A:
- fputs ("Loongson 3A", file);
- break;
case AFL_EXT_OCTEON:
fputs ("Cavium Networks Octeon", file);
break;
case AFL_EXT_LOONGSON_2F:
fputs ("ST Microelectronics Loongson 2F", file);
break;
+ case AFL_EXT_INTERAPTIV_MR2:
+ fputs ("Imagination interAptiv MR2", file);
+ break;
default:
fprintf (file, "%s (%d)", _("Unknown"), isa_ext);
break;
const struct bfd_elf_special_section _bfd_mips_elf_special_sections[] =
{
- { STRING_COMMA_LEN (".lit4"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
- { STRING_COMMA_LEN (".lit8"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
+ { STRING_COMMA_LEN (".lit4"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
+ { STRING_COMMA_LEN (".lit8"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".mdebug"), 0, SHT_MIPS_DEBUG, 0 },
- { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
+ { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".ucode"), 0, SHT_MIPS_UCODE, 0 },
- { NULL, 0, 0, 0, 0 }
+ { STRING_COMMA_LEN (".MIPS.xhash"), 0, SHT_MIPS_XHASH, SHF_ALLOC },
+ { NULL, 0, 0, 0, 0 }
};
/* Merge non visibility st_other attributes. Ensure that the
return tdata->abiflags_valid ? &tdata->abiflags : NULL;
}
-void
-_bfd_mips_post_process_headers (bfd *abfd, struct bfd_link_info *link_info)
+/* MIPS libc ABI versions, used with the EI_ABIVERSION ELF file header
+ field. Taken from `libc-abis.h' generated at GNU libc build time.
+ Using a MIPS_ prefix as other libc targets use different values. */
+enum
+{
+ MIPS_LIBC_ABI_DEFAULT = 0,
+ MIPS_LIBC_ABI_MIPS_PLT,
+ MIPS_LIBC_ABI_UNIQUE,
+ MIPS_LIBC_ABI_MIPS_O32_FP64,
+ MIPS_LIBC_ABI_ABSOLUTE,
+ MIPS_LIBC_ABI_XHASH,
+ MIPS_LIBC_ABI_MAX
+};
+
+bfd_boolean
+_bfd_mips_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
{
- struct mips_elf_link_hash_table *htab;
+ struct mips_elf_link_hash_table *htab = NULL;
Elf_Internal_Ehdr *i_ehdrp;
+ if (!_bfd_elf_init_file_header (abfd, link_info))
+ return FALSE;
+
i_ehdrp = elf_elfheader (abfd);
if (link_info)
{
htab = mips_elf_hash_table (link_info);
BFD_ASSERT (htab != NULL);
-
- if (htab->use_plts_and_copy_relocs && !htab->is_vxworks)
- i_ehdrp->e_ident[EI_ABIVERSION] = 1;
}
- _bfd_elf_post_process_headers (abfd, link_info);
+ if (htab != NULL && htab->use_plts_and_copy_relocs && !htab->is_vxworks)
+ i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_MIPS_PLT;
if (mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64
|| mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64A)
- i_ehdrp->e_ident[EI_ABIVERSION] = 3;
+ i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_MIPS_O32_FP64;
+
+ /* Mark that we need support for absolute symbols in the dynamic loader. */
+ if (htab != NULL && htab->use_absolute_zero && htab->gnu_target)
+ i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_ABSOLUTE;
+
+ /* Mark that we need support for .MIPS.xhash in the dynamic linker,
+ if it is the only hash section that will be created. */
+ if (link_info && link_info->emit_gnu_hash && !link_info->emit_hash)
+ i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_XHASH;
+ return TRUE;
}
int
-_bfd_mips_elf_compact_eh_encoding (struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
+_bfd_mips_elf_compact_eh_encoding
+ (struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
{
return DW_EH_PE_pcrel | DW_EH_PE_sdata4;
}
/* Return the opcode for can't unwind. */
int
-_bfd_mips_elf_cant_unwind_opcode (struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
+_bfd_mips_elf_cant_unwind_opcode
+ (struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
{
return COMPACT_EH_CANT_UNWIND_OPCODE;
}
+
+/* Record a position XLAT_LOC in the xlat translation table, associated with
+ the hash entry H. The entry in the translation table will later be
+ populated with the real symbol dynindx. */
+
+void
+_bfd_mips_elf_record_xhash_symbol (struct elf_link_hash_entry *h,
+ bfd_vma xlat_loc)
+{
+ struct mips_elf_link_hash_entry *hmips;
+
+ hmips = (struct mips_elf_link_hash_entry *) h;
+ hmips->mipsxhash_loc = xlat_loc;
+}