# Cole Poirier
-Apprentice and assistant Project coordinator for Libre-SOC
+Former Apprentice at Libre-SOC
* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=colepoirier%40gmail.com&emailassigned_to1=1&emailcc1=1&emailtype1=substring&resolution=---)
## Currently working on
- Reach out to lu_zero of Gentoo about SV POWER binutils
-- <https://bugs.libre-soc.org/show_bug.cgi?id=383> Complete first functional POWER9 Core
- <https://bugs.libre-soc.org/show_bug.cgi?id=486> Script and document the setup and installation of microwatt dependency on the wiki-HDL_workflow page
- <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
- shared with lkcl
## Paid
-# wishbone 2019-10-043 1-OCT-2020
+### MOU coriolis2 2019-10-029, received payment on 2021-MAY-5
+
+- <https://bugs.libre-soc.org/show_bug.cgi?id=502> determine SRAM block size and implement it
+ - EUR 50
+
+### MOU wishbone 2019-10-043, received payment on 2021-MAY-5
+
+- <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI JTAG TAP needed
+ - EUR 150
+
+### MOU coriolis2 2019-10-029, received payment on 2020-DEC-20
+
+- <https://bugs.libre-soc.org/show_bug.cgi?id=178> Coriolis2 tutorial
+ - EUR 500
+
+### MOU wishbone 2019-10-043, received payment on 2020-OCT-01
- <https://bugs.libre-soc.org/show_bug.cgi?id=401> Convert 180nm Test ASIC Mem Layout diagram to SVG
- EUR 150
- <https://bugs.libre-soc.org/show_bug.cgi?id=351> Virtual Regfile port
- EUR 200. shared, lkcl (50%, EUR 100), cole (50%, EUR 100)
-# coriolis2 2019-10-029 1-OCT-2020
+### MOU coriolis2 2019-10-029, received payment on 2020-OCT-01
- Coriolis2 documentation and setup scripts, (documentation budget, EUR 200)
- <https://bugs.libre-soc.org/show_bug.cgi?id=291>