## Completed but not yet submitted
+## Submitted for NLNet RFP
+
+submitted but not confirmed paid:
+
- <https://bugs.libre-soc.org/show_bug.cgi?id=401> Convert 180nm Test ASIC Mem Layout diagram to SVG
- EUR 150
- <https://bugs.libre-soc.org/show_bug.cgi?id=351> Virtual Regfile port
- EUR 200. shared, lkcl (50%, EUR 100), cole (50%, EUR 100)
-
-## Submitted for NLNet RFP
-
-submitted but not confirmed paid:
-
### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
## Paid