* <https://ep2021.europython.eu/faq/#nodes>
* <https://ep2021.europython.eu/schedule/>
+* free live stream access <https://ep2021.europython.eu/registration/buy-tickets/>
* <https://ep2021.europython.eu/talks/46wiGSm-the-libre-soc-project/>
* <https://ep2021.europython.eu/schedule/30-july?selected=46wiGSm-the-libre-soc-project#12:15-UTC>
+* <https://youtu.be/wH3RBfzuPlI?t=4791> Brian Room, start of talk
# Proposal
* An IEEE754 FP hardware library has been developed using nmigen/python, as are hundreds of thousands of unit tests
* An OpenPOWER ISA simulator is written in python, and is actually a PLY compiler based on the GardenSnake example
* Several thousand unit tests for the HDL and simulator are written in python
-* coriolis2, the VLSI ASIC layout toolcjain, is a mixed c++ python application
+* coriolis2, the VLSI ASIC layout toolchain, is a mixed c++ python application
* Even the Standard Cell Library being used, called FlexLib, by Chips4Makers, is in python.
To say that python is critical to the project would be a massive understatement. This talk will give a brief overview of the above areas and give a glimpse into why python was chosen for each.