# FOSDEM 2022
-# OpenHardware Dev Room
+* Schedule:
+<https://fosdem.org/2022/schedule/track/libre_open_vlsi_and_fpga/>
+* notes to devroom organisers:
+<https://fosdem.org/2022/manuals/program/devroom/>
+* fosdem video overview: <https://upload.video.fosdem.org/overview>
+* reviewers: <https://penta.fosdem.org/submission/FOSDEM22/events>
+* Libre-SOC Project with video <https://fosdem.org/2022/schedule/event/libresocproject/>
+* Coriolis2 <https://fosdem.org/2022/schedule/event/coriolis2/>
-TODO:
+# Libre/Open VLSI and FPGA Hardware, Simulation and Verification Dev Room
-* write to openhardware dev room mailing list (private archives)
- - DONE 13nov2022. no response. assume dead list
- - therefore take responsibility for writing proposal
-* write proposal
-
-## OHW Devroom Proposal
+## Devroom Proposal
<https://submission.fosdem.org/submission/devroom>
-Title: **Libre/Open Hardware CAD, Modelling and VLSI Dev Room**
+Title: **Libre/Open VLSI and FPGA Hardware, Simulation and Verification Dev Room**
-Elaborate description (including possible topics)
+**Updated** Elaborate description (including possible topics)
- Open Hardware projects
- VLSI ASIC Design and Manufacture
* Libre/Open DIY Foundries (nanoscale 3D printing)
- * Open EDA and VLSI tools and toolflow
+ * Libre/Open VLSI tools and toolflow
* Libre/Open VLSI Cell Libraries
* VLSI Simulation and Verification
- FPGAs
* Libre/Open FPGA designs
* FPGA toolchains and Reverse-Engineering
* FPGA workflow
-- RTL and HDL
- * Advanced and innovative
-- Circuit Design
- * Printed circuit board design tools
- * Circuit simulation
-- 3d modeling and analysis
- * Solid modeling tools
- * Meshing, modeling and transforming physical representations
- * Finite element analysis
-- 3d printing
- * 3d slicing tools
- * Motor control
-- Machine design and integration
- * ECAD/MCAD integration
- * Thermal analysis
- * Wire modeling
-- Physical Model Data storage
- * Data representation and optimization
- * Version control in hardware data storage
- * Collaborative and team-based hardware design techniques
- * Building information Modelling
+- VLSI RTL and HDL
+ * Advanced and innovative alternative HDL tools
+ * Formal Correctness Proofs
+ * Testing methodologies
+ * Hardware Trust (and how to break it)
+- Software Engineering as applied to Hardware
+ * Continuous Integration for VLSI
+ * Automated tool development (RTL to GDS-II)
+ * Automated testing
Why does it fit FOSDEM
There has been a lot of progress happening in the last few years regarding
libre/free chip technology. From RISC-V and OpenPOWER to attempts to create
libre/free processes to make your own chips. Various countries have been
-catching up and helping and building up their semiconducter industries,
+catching up and helping and building up their semiconductorr industries,
some even pushing libre/free toolchains. E.g. EU sponsors various projects
to work in this field to create open toolchains.
-Meanwhile others push the boundaries to liberate former closed source toolchains for FPGAs. While an often neglected topic, a lot of work happens by various fantastic players all around the world. We hope to bring some attention to this areas which we basicly all too often take as a given when using computers or electronics.
-We therefore hope to give Open Hardware and their respective toolchains a small platform, all the way from silicone to pcb.
+Meanwhile others push the boundaries to liberate former closed source toolchains for FPGAs. While an often neglected topic, a lot of work happens by various fantastic players all around the world. We hope to bring some attention to these areas which we basicly all too often take as a given when
+using computers or electronics.
+We therefore hope to give Open Hardware and their respective toolchains a
+small platform, all the way from silicon to PCB.
+
+Note to organisers: we don't mind merging with another devroom (then
+helping out), as long as the words "Libre/Open Hardware" are included in
+the devroom title, and the VLSI and FPGA topics are included. NLnet
+now sponsors dozens of hardware projects alone, and the google skywater
+130nm project with e-fabless has produced a massive new innovative
+community that simply did not exist last year. We are also happy for
+other (smaller) devrooms to merge with this one.
Preferred slot: Full Day
+
+# Call for Papers<a name="cfp" />
+
+This is a new devroom dedicated to Libre/Open VLSI, aka "Nanoscale 3D
+Printing".
+
+### What is FOSDEM?
+
+~~Stolen~~/Borrowed from the website:
+
+_**FOSDEM is a free event for software developers to meet, share ideas and collaborate.**
+Every year, thousands of developers of free and open source software from all over the world gather at the event in Brussels.
+...
+FOSDEM 2022 will take place on Saturday 5 and Sunday 6 February 2022. It will be an online event._
+
+### Important stuff:
+- FOSDEM is free to attend. There is no registration.
+- [FOSDEM website](https://fosdem.org/)
+- [FOSDEM code of conduct](https://fosdem.org/2022/practical/conduct/)
+- [FOSDEM Schedule](https://fosdem.org/2022/schedule/)
+
+### Desirable topics:
+
+This devroom welcomes anything related to the topic of nanoscale
+3D printing - more commonly known as "VLSI ASIC design". If you
+are making an ASIC, or designing one, or using FPGAs, or developing
+an FPGA Board, or developing tools and techniques that make VLSI ASIC
+design easier, we'd love to hear from you. Here's a list of topics:
+
+- Open Hardware projects
+- VLSI ASIC Design and Manufacture
+ * Libre/Open DIY Foundries (nanoscale 3D printing)
+ * Libre/Open VLSI tools and toolflow
+ * Libre/Open VLSI Cell Libraries
+ * VLSI Simulation and Verification
+- VLSI Tools in use or in development
+ * Silicon-proven (QFlow, coriolis2, OpenLANE)
+ * Under development (LibreEDA, other)
+ * Advances in Algorithmics in Place and Route and Layout
+- FPGAs
+ * Libre/Open FPGA designs
+ * FPGA toolchains and Reverse-Engineering
+ * FPGA workflow
+- VLSI RTL and HDL
+ * Advanced and innovative alternative HDL tools
+ * Formal Correctness Proofs
+ * Testing methodologies
+ * Hardware Trust (and how to break it)
+- Software Engineering as applied to Hardware
+ * Continuous Integration for VLSI
+ * Automated tool development (RTL to GDS-II)
+ * Automated testing
+
+### Topic overlap
+
+There is quite a lot of overlap this year with:
+
+* [CAD devroom]( https://fosdem.org/2022/schedule/track/open_source_computer_aided_modeling_and_design/),
+* [Emulator devroom](https://fosdem.org/2022/schedule/track/emulator_development/)
+* [Retro room](https://fosdem.org/2022/schedule/track/retrocomputing/)
+
+It is entirely up to you as a speaker which devroom you choose: the
+main reason for a new VLSI devroom this year is because it is a rapidly
+expanding area formerly entirely NDA'd.
+
+### How to submit your proposal
+
+To submit a talk, please visit the [FOSDEM 2022 Pentabarf website](https://penta.fosdem.org/submission/FOSDEM22) (the mystery of whether pentabarf means barfing in 5 directions or in 5 colors has not been solved yet).
+
+Create an **event** and click on **Show all** in the top right corner to display the full form. Make sure you choose the right devroom
+in the track drop-down menu (so that we see it rather than another
+devroom's organisers)
+
+### What should be in your submission
+
+- name
+- short bio
+- contact info
+- title (funny titles are ~~required~~/appreciated)
+- abstract (what you're going talk about)
+- duration
+
+### Things to be aware of
+
+* The reference time will be Brussels local lime (CET)
+ <https://www.timeanddate.com/worldclock/belgium/brussels>
+* Talks have to be pre-recorded in advance between the first two weeks
+ of January, and will be streamed during the event.
+* Q/A session will be taken live, just after each recorded talk. As
+ such, please make sure that you will be online and available on the
+ day of the event.
+* A facility will be provided for people watching to chat between
+ themselves.
+* A facility will be provided for people watching to submit questions.
+
+### Important Dates
+
+- **December 28th: submission deadline**
+ - FAQ - is the submission deadline final?
+ - Technically speaking, you can submit talks till pentabarf
+ closes, which should be somewhere in January
+ - However, talks submitted before the 29th get a higher precedence
+- ASAP: announcement selected talks
+- January: speakers are contacted to upload pre-record sessions
+- February 6th: FOSDEM! (with live Q&A during recorded talks)
+
+### Contact us
+
+- [Luke Leighton](mailto:lkcl@lkcl.net)
+- [Christian Pfaab](mailto:pfaab@uni-bremen.de)
+- [mwfc](mwfc@chaos.social)
+- "lkcl" or "mwfc" on #fosdem Libera.Chat IRC
+
+# TODO
+
+* write to openhardware dev room mailing list (private archives)
+ - 13nov2022. no response. assume dead list DONE
+ - therefore take responsibility for writing proposal DONE
+* write proposal DONE 14nov2022
+* submit proposal DONE 14no42022
+* CfP TODO
+* Talk to devroom managers ONGOING
+* contact interested people
+ - https://www.crowdsupply.com/great-scott-gadgets/luna (ktemkin)
+ - danielgrosse https://twitter.com/daniel_grosse
+ - Ganesen Narayanasamy, IBM India, Education Course
+ - openwifi <https://github.com/open-sdr/openwifi/issues/99>
+ - libresilicon (actual DIY Foundry equipment)
+ - opentapeoutdev
+ - openlane / openroad
+ - Staf (Chips4Makers)
+ - efabless
+ - libre-soc
+ - LIP6 / CNRS (coriolis2)
+ - apertus <https://www.apertus.org/axiom-ecosystem>
+ - NLnet (to help with outreach)
+ - Crowdsupply (ditto)
+ - KiCAD and other EDA tools
+ - LibreEDA developer (tkramer)
+ - Pine64 <https://wiki.pine64.org/wiki/PineNote>
+ - Bunnie, xobs (https://www.bunniestudios.com/)
+ - Tim Ansell / Claire Wolfe symbiflow et al https://symbiflow.github.io
+ - Libera.Chat channels:
+ - yosys DONE 29nov2021
+ - opentapeoutdev DONE 29nov2021
+ - symbiflow DONE 29nov2021
+ - openpower DONE 29nov2021
+ - libre-soc DONE 29nov2021
+ - Twitter channels
+ - Initial CfP <https://twitter.com/lkcl/status/1465290569681457157>
+ DONE 29nov2021
+ @Daniel_Grosse @GanesanBlue @TLLim888 @thepine64 @Chips4Makers
+ @bunniestudios @librecores @efabless @LIP6_lab @OpenPOWERorg
+ @OTapeout @YosysHQ @NLnetFDN @NgiPointer @symbiflow @mithro
+ @pepijndevos @crowd_supply @jxjputaoshu
projects / libreriscv.git / blobdiff