-# Copyright (c) 2010-2012, 2015 ARM Limited
+# Copyright (c) 2010-2012, 2015-2019 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
#
# Authors: Kevin Lim
+from __future__ import print_function
+
from m5.objects import *
from Benchmarks import *
from m5.util import *
-import PlatformConfig
+from common import PlatformConfig
# Populate to reflect supported os types per target ISA
os_types = { 'alpha' : [ 'linux' ],
'android-gingerbread',
'android-ics',
'android-jellybean',
- 'android-kitkat' ],
+ 'android-kitkat',
+ 'android-nougat', ],
}
class CowIdeDisk(IdeDisk):
self.tsunami.attachIO(self.iobus)
self.tsunami.ide.pio = self.iobus.master
- self.tsunami.ide.config = self.iobus.master
self.tsunami.ethernet.pio = self.iobus.master
- self.tsunami.ethernet.config = self.iobus.master
if ruby:
# Store the dma devices for later connection to dma ruby ports.
self.partition_desc.port = self.membus.master
self.intrctrl = IntrControl()
self.disk0 = CowMmDisk()
- self.disk0.childImage(disk('disk.s10hw2'))
+ self.disk0.childImage(mdesc.disk())
self.disk0.pio = self.iobus.master
# The puart0 and hvuart are placed on the IO bus, so create ranges
def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
dtb_filename=None, bare_metal=False, cmdline=None,
- external_memory=""):
+ external_memory="", ruby=False, security=False):
assert machine_type
- default_dtbs = {
- "RealViewEB": None,
- "RealViewPBX": None,
- "VExpress_EMM": "vexpress.aarch32.ll_20131205.0-gem5.%dcpu.dtb" % num_cpus,
- "VExpress_EMM64": "vexpress.aarch64.20140821.dtb",
- }
-
- default_kernels = {
- "RealViewEB": "vmlinux.arm.smp.fb.2.6.38.8",
- "RealViewPBX": "vmlinux.arm.smp.fb.2.6.38.8",
- "VExpress_EMM": "vmlinux.aarch32.ll_20131205.0-gem5",
- "VExpress_EMM64": "vmlinux.aarch64.20140821",
- }
+ pci_devices = []
if bare_metal:
self = ArmSystem()
self.readfile = mdesc.script()
self.iobus = IOXBar()
- self.membus = MemBus()
- self.membus.badaddr_responder.warn_access = "warn"
- self.bridge = Bridge(delay='50ns')
- self.bridge.master = self.iobus.slave
- self.bridge.slave = self.membus.master
+ if not ruby:
+ self.bridge = Bridge(delay='50ns')
+ self.bridge.master = self.iobus.slave
+ self.membus = MemBus()
+ self.membus.badaddr_responder.warn_access = "warn"
+ self.bridge.slave = self.membus.master
self.mem_mode = mem_mode
machine_type = platform_class.__name__
self.realview = platform_class()
- if not dtb_filename and not bare_metal:
- try:
- dtb_filename = default_dtbs[machine_type]
- except KeyError:
- fatal("No DTB specified and no default DTB known for '%s'" % \
- machine_type)
-
if isinstance(self.realview, VExpress_EMM64):
if os.path.split(mdesc.disk())[-1] == 'linux-aarch32-ael.img':
- print "Selected 64-bit ARM architecture, updating default disk image..."
+ print("Selected 64-bit ARM architecture, updating default "
+ "disk image...")
mdesc.diskname = 'linaro-minimal-aarch64.img'
- self.cf0 = CowIdeDisk(driveID='master')
- self.cf0.childImage(mdesc.disk())
# Attach any PCI devices this platform supports
self.realview.attachPciDevices()
- # default to an IDE controller rather than a CF one
- try:
+
+ self.cf0 = CowIdeDisk(driveID='master')
+ self.cf0.childImage(mdesc.disk())
+ # Old platforms have a built-in IDE or CF controller. Default to
+ # the IDE controller if both exist. New platforms expect the
+ # storage controller to be added from the config script.
+ if hasattr(self.realview, "ide"):
self.realview.ide.disks = [self.cf0]
- except:
+ elif hasattr(self.realview, "cf_ctrl"):
self.realview.cf_ctrl.disks = [self.cf0]
+ else:
+ self.pci_ide = IdeController(disks=[self.cf0])
+ pci_devices.append(self.pci_ide)
self.mem_ranges = []
size_remain = long(Addr(mdesc.mem()))
for region in self.realview._mem_regions:
- if size_remain > long(region[1]):
- self.mem_ranges.append(AddrRange(region[0], size=region[1]))
- size_remain = size_remain - long(region[1])
+ if size_remain > long(region.size()):
+ self.mem_ranges.append(region)
+ size_remain = size_remain - long(region.size())
else:
- self.mem_ranges.append(AddrRange(region[0], size=size_remain))
+ self.mem_ranges.append(AddrRange(region.start, size=size_remain))
size_remain = 0
break
warn("Memory size specified spans more than one region. Creating" \
" the amount of DRAM you've selected. Please try" \
" another platform")
+ self.have_security = security
+
if bare_metal:
# EOT character on UART will end the simulation
- self.realview.uart.end_on_eot = True
+ self.realview.uart[0].end_on_eot = True
else:
- if machine_type in default_kernels:
- self.kernel = binary(default_kernels[machine_type])
-
if dtb_filename:
self.dtb_filename = binary(dtb_filename)
# During initialization, system_port -> membus -> iobus -> nvmem.
if external_memory:
self.realview.setupBootLoader(self.iobus, self, binary)
+ elif ruby:
+ self.realview.setupBootLoader(None, self, binary)
else:
self.realview.setupBootLoader(self.membus, self, binary)
- self.gic_cpu_addr = self.realview.gic.cpu_addr
+
+ if hasattr(self.realview.gic, 'cpu_addr'):
+ self.gic_cpu_addr = self.realview.gic.cpu_addr
+
self.flags_addr = self.realview.realview_io.pio_addr + 0x30
# This check is for users who have previously put 'android' in
# release-specific tweaks
if 'kitkat' in mdesc.os_type():
cmdline += " androidboot.hardware=gem5 qemu=1 qemu.gles=0 " + \
- "android.bootanim=0"
+ "android.bootanim=0 "
+ elif 'nougat' in mdesc.os_type():
+ cmdline += " androidboot.hardware=gem5 qemu=1 qemu.gles=0 " + \
+ "android.bootanim=0 " + \
+ "vmalloc=640MB " + \
+ "android.early.fstab=/fstab.gem5 " + \
+ "androidboot.selinux=permissive " + \
+ "video=Virtual-1:1920x1080-16"
self.boot_osflags = fillInCmdline(mdesc, cmdline)
self.bridge.ranges = [self.realview.nvmem.range]
self.realview.attachOnChipIO(self.iobus)
+ # Attach off-chip devices
+ self.realview.attachIO(self.iobus)
+ elif ruby:
+ self._dma_ports = [ ]
+ self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports)
+ self.realview.attachIO(self.iobus, dma_ports=self._dma_ports)
else:
self.realview.attachOnChipIO(self.membus, self.bridge)
- self.realview.attachIO(self.iobus)
+ # Attach off-chip devices
+ self.realview.attachIO(self.iobus)
+
+ for dev_id, dev in enumerate(pci_devices):
+ dev.pci_bus, dev.pci_dev, dev.pci_func = (0, dev_id + 1, 0)
+ self.realview.attachPciDevice(
+ dev, self.iobus,
+ dma_ports=self._dma_ports if ruby else None)
+
self.intrctrl = IntrControl()
self.terminal = Terminal()
self.vncserver = VncServer()
- self.system_port = self.membus.slave
+ if not ruby:
+ self.system_port = self.membus.slave
+
+ if ruby:
+ if buildEnv['PROTOCOL'] == 'MI_example' and num_cpus > 1:
+ fatal("The MI_example protocol cannot implement Load/Store "
+ "Exclusive operations. Multicore ARM systems configured "
+ "with the MI_example protocol will not work properly.")
+ warn("You are trying to use Ruby on ARM, which is not working "
+ "properly yet.")
return self
self.malta = BaseMalta()
self.malta.attachIO(self.iobus)
self.malta.ide.pio = self.iobus.master
- self.malta.ide.config = self.iobus.master
self.malta.ide.dma = self.iobus.slave
self.malta.ethernet.pio = self.iobus.master
- self.malta.ethernet.config = self.iobus.master
self.malta.ethernet.dma = self.iobus.slave
self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
read_only = True))
# Set up the Intel MP table
base_entries = []
ext_entries = []
- for i in xrange(numCPUs):
+ for i in range(numCPUs):
bp = X86IntelMPProcessor(
local_apic_id = i,
local_apic_version = 0x14,
# In gem5 Pc::calcPciConfigAddr(), it required "assert(bus==0)",
# but linux kernel cannot config PCI device if it was not connected to PCI bus,
# so we fix PCI bus id to 0, and ISA bus id to 1.
- pci_bus = X86IntelMPBus(bus_id = 0, bus_type='PCI')
+ pci_bus = X86IntelMPBus(bus_id = 0, bus_type='PCI ')
base_entries.append(pci_bus)
- isa_bus = X86IntelMPBus(bus_id = 1, bus_type='ISA')
+ isa_bus = X86IntelMPBus(bus_id = 1, bus_type='ISA ')
base_entries.append(isa_bus)
connect_busses = X86IntelMPBusHierarchy(bus_id=1,
subtractive_decode=True, parent_bus=0)
self.etherlink.dump = Parent.etherdump
return self
+
+
+def makeDistRoot(testSystem,
+ rank,
+ size,
+ server_name,
+ server_port,
+ sync_repeat,
+ sync_start,
+ linkspeed,
+ linkdelay,
+ dumpfile):
+ self = Root(full_system = True)
+ self.testsys = testSystem
+
+ self.etherlink = DistEtherLink(speed = linkspeed,
+ delay = linkdelay,
+ dist_rank = rank,
+ dist_size = size,
+ server_name = server_name,
+ server_port = server_port,
+ sync_start = sync_start,
+ sync_repeat = sync_repeat)
+
+ if hasattr(testSystem, 'realview'):
+ self.etherlink.int0 = Parent.testsys.realview.ethernet.interface
+ elif hasattr(testSystem, 'tsunami'):
+ self.etherlink.int0 = Parent.testsys.tsunami.ethernet.interface
+ else:
+ fatal("Don't know how to connect DistEtherLink to this system")
+
+ if dumpfile:
+ self.etherdump = EtherDump(file=dumpfile)
+ self.etherlink.dump = Parent.etherdump
+
+ return self