self.readfile = mdesc.script()
self.iobus = Bus(bus_id=0)
self.membus = Bus(bus_id=1)
- self.bridge = Bridge()
+ self.bridge = Bridge(fix_partial_write_b=True)
self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
self.bridge.side_a = self.iobus.port
self.bridge.side_b = self.membus.port
read_only = True))
self.intrctrl = IntrControl()
self.mem_mode = mem_mode
- self.sim_console = SimConsole(listener=ConsoleListener(port=3456))
+ self.sim_console = SimConsole()
self.kernel = binary('vmlinux')
self.pal = binary('ts_osfpal')
self.console = binary('console')
self.membus = Bus(bus_id=1)
self.bridge = Bridge()
self.t1000 = T1000()
+ self.t1000.attachOnChipIO(self.membus)
self.t1000.attachIO(self.iobus)
self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
self.disk0 = CowMmDisk()
self.disk0.childImage(disk('disk.s10hw2'))
self.disk0.pio = self.iobus.port
- self.reset_bin = binary('reset.bin')
- self.hypervisor_bin = binary('q.bin')
- self.openboot_bin = binary('openboot.bin')
+ self.reset_bin = binary('reset_new.bin')
+ self.hypervisor_bin = binary('q_new.bin')
+ self.openboot_bin = binary('openboot_new.bin')
self.nvram_bin = binary('nvram1')
self.hypervisor_desc_bin = binary('1up-hv.bin')
self.partition_desc_bin = binary('1up-md.bin')
self.etherdump = EtherDump(file=dumpfile)
self.etherlink.dump = Parent.etherdump
- self.clock = '1THz'
return self