misc: Merge branch 'release-staging-v20.0.0.0' into develop

[gem5.git] / configs / common / Simulation.py

diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py
index ceba1474ae22331ac379006053f3c607d324bd44..e53c755c6c09e1e5528158eaa29966641cd1a8bc 100644 (file)
--- a/configs/common/Simulation.py
+++ b/configs/common/Simulation.py
@@ -36,25 +36,26 @@
 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Lisa Hsu
 
 from __future__ import print_function
 from __future__ import absolute_import
 
+import six
 import sys
 from os import getcwd
 from os.path import join as joinpath
 
 from common import CpuConfig
-from . import ObjectList
-from . import MemConfig
+from common import ObjectList
 
 import m5
 from m5.defines import buildEnv
 from m5.objects import *
 from m5.util import *
 
+if six.PY3:
+    long = int
+
 addToPath('../common')
 
 def getCPUClass(cpu_type):
@@ -97,7 +98,7 @@ def setCPUClass(options):
 def setMemClass(options):
     """Returns a memory controller class."""
 
-    return MemConfig.get(options.mem_type)
+    return ObjectList.mem_list.get(options.mem_type)
 
 def setWorkCountOptions(system, options):
     if options.work_item_id != None: