+# Copyright (c) 2010-2011 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
#
# Authors: Ali Saidi
-import optparse, os, sys
+import optparse
+import os
+import sys
import m5
+from m5.defines import buildEnv
from m5.objects import *
-m5.AddToPath('../common')
+from m5.util import addToPath, fatal
+
+addToPath('../common')
+
from FSConfig import *
from SysPaths import *
from Benchmarks import *
import Simulation
+import CacheConfig
from Caches import *
-if not m5.build_env['FULL_SYSTEM']:
- m5.panic("This script requires full-system mode (ALPHA_FS).")
-
# Get paths we might need. It's expected this file is in m5/configs/example.
config_path = os.path.dirname(os.path.abspath(__file__))
config_root = os.path.dirname(config_path)
parser = optparse.OptionParser()
+# Simulation options
+parser.add_option("--timesync", action="store_true",
+ help="Prevent simulated time from getting ahead of real time")
+
# System options
parser.add_option("--kernel", action="store", type="string")
parser.add_option("--script", action="store", type="string")
-
+parser.add_option("--frame-capture", action="store_true",
+ help="Stores changed frame buffers from the VNC server to compressed "\
+ "files in the gem5 output directory")
+
+if buildEnv['TARGET_ISA'] == "arm":
+ parser.add_option("--bare-metal", action="store_true",
+ help="Provide the raw system without the linux specific bits")
+ parser.add_option("--machine-type", action="store", type="choice",
+ choices=ArmMachineType.map.keys(), default="RealView_PBX")
# Benchmark options
parser.add_option("--dual", action="store_true",
help="Simulate two systems attached with an ethernet link")
else:
bm = [SysConfig()]
-if m5.build_env['TARGET_ISA'] == "alpha":
+np = options.num_cpus
+
+if buildEnv['TARGET_ISA'] == "alpha":
test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
-elif m5.build_env['TARGET_ISA'] == "sparc":
+elif buildEnv['TARGET_ISA'] == "mips":
+ test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
+elif buildEnv['TARGET_ISA'] == "sparc":
test_sys = makeSparcSystem(test_mem_mode, bm[0])
+elif buildEnv['TARGET_ISA'] == "x86":
+ test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
+ setWorkCountOptions(test_sys, options)
+elif buildEnv['TARGET_ISA'] == "arm":
+ test_sys = makeArmSystem(test_mem_mode,
+ options.machine_type, bm[0],
+ bare_metal=options.bare_metal)
+ setWorkCountOptions(test_sys, options)
else:
- m5.panic("incapable of building non-alpha or non-sparc full system!")
+ fatal("incapable of building non-alpha or non-sparc full system!")
if options.kernel is not None:
test_sys.kernel = binary(options.kernel)
if options.script is not None:
test_sys.readfile = options.script
-np = options.num_cpus
-
-if options.l2cache:
- test_sys.l2 = L2Cache(size = '2MB')
- test_sys.tol2bus = Bus()
- test_sys.l2.cpu_side = test_sys.tol2bus.port
- test_sys.l2.mem_side = test_sys.membus.port
+test_sys.init_param = options.init_param
test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
+
+if bm[0]:
+ mem_size = bm[0].mem()
+else:
+ mem_size = SysConfig().mem()
+if options.caches or options.l2cache:
+ test_sys.iocache = IOCache(addr_ranges=[mem_size])
+ test_sys.iocache.cpu_side = test_sys.iobus.master
+ test_sys.iocache.mem_side = test_sys.membus.slave
+else:
+ test_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
+ ranges = [test_sys.physmem.range])
+ test_sys.iobridge.slave = test_sys.iobus.master
+ test_sys.iobridge.master = test_sys.membus.slave
+
for i in xrange(np):
- if options.caches:
- test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
- L1Cache(size = '64kB'))
+ if options.fastmem:
+ test_sys.cpu[i].physmem_port = test_sys.physmem.port
+ if options.checker:
+ test_sys.cpu[i].addCheckerCpu()
- if options.l2cache:
- test_sys.cpu[i].connectMemPorts(test_sys.tol2bus)
- else:
- test_sys.cpu[i].connectMemPorts(test_sys.membus)
+CacheConfig.config_cache(options, test_sys)
+
+if buildEnv['TARGET_ISA'] == 'mips':
+ setMipsOptions(TestCPUClass)
if len(bm) == 2:
- if m5.build_env['TARGET_ISA'] == 'alpha':
+ if buildEnv['TARGET_ISA'] == 'alpha':
drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
- elif m5.build_env['TARGET_ISA'] == 'sparc':
+ elif buildEnv['TARGET_ISA'] == 'mips':
+ drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
+ elif buildEnv['TARGET_ISA'] == 'sparc':
drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
+ elif buildEnv['TARGET_ISA'] == 'x86':
+ drive_sys = makeX86System(drive_mem_mode, np, bm[1])
+ elif buildEnv['TARGET_ISA'] == 'arm':
+ drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
+
drive_sys.cpu = DriveCPUClass(cpu_id=0)
- drive_sys.cpu.connectMemPorts(drive_sys.membus)
+ drive_sys.cpu.createInterruptController()
+ drive_sys.cpu.connectAllPorts(drive_sys.membus)
+ if options.fastmem:
+ drive_sys.cpu.physmem_port = drive_sys.physmem.port
if options.kernel is not None:
drive_sys.kernel = binary(options.kernel)
+ drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
+ ranges = [drive_sys.physmem.range])
+ drive_sys.iobridge.slave = drive_sys.iobus.master
+ drive_sys.iobridge.master = drive_sys.membus.slave
- root = makeDualRoot(test_sys, drive_sys, options.etherdump)
+ drive_sys.init_param = options.init_param
+ root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
elif len(bm) == 1:
- root = Root(system=test_sys)
+ root = Root(full_system=True, system=test_sys)
else:
print "Error I don't know how to create more than 2 systems."
sys.exit(1)
+if options.timesync:
+ root.time_sync_enable = True
+
+if options.frame_capture:
+ VncServer.frame_capture = True
+
Simulation.run(options, root, test_sys, FutureClass)