CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable

[gem5.git] / configs / example / fs.py

diff --git a/configs/example/fs.py b/configs/example/fs.py
index e9bc9afb66fdb353bd11609adca0b533094fb1d9..b3d607a1b0f24920e469af629c6914cf76d3b953 100644 (file)
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2010 ARM Limited
+# Copyright (c) 2010-2011 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -47,9 +47,6 @@ from m5.defines import buildEnv
 from m5.objects import *
 from m5.util import addToPath, fatal
 
-if not buildEnv['FULL_SYSTEM']:
-    fatal("This script requires full-system mode (*_FS).")
-
 addToPath('../common')
 
 from FSConfig import *
@@ -72,6 +69,10 @@ parser.add_option("--timesync", action="store_true",
 # System options
 parser.add_option("--kernel", action="store", type="string")
 parser.add_option("--script", action="store", type="string")
+parser.add_option("--frame-capture", action="store_true",
+        help="Stores changed frame buffers from the VNC server to compressed "\
+        "files in the gem5 output directory")
+
 if buildEnv['TARGET_ISA'] == "arm":
     parser.add_option("--bare-metal", action="store_true",
                help="Provide the raw system without the linux specific bits")
@@ -131,10 +132,13 @@ elif buildEnv['TARGET_ISA'] == "mips":
 elif buildEnv['TARGET_ISA'] == "sparc":
     test_sys = makeSparcSystem(test_mem_mode, bm[0])
 elif buildEnv['TARGET_ISA'] == "x86":
-    test_sys = makeLinuxX86System(test_mem_mode, np, bm[0])
+    test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
+    setWorkCountOptions(test_sys, options)
 elif buildEnv['TARGET_ISA'] == "arm":
-    test_sys = makeLinuxArmSystem(test_mem_mode, bm[0],
-            bare_metal=options.bare_metal, machine_type=options.machine_type)
+    test_sys = makeArmSystem(test_mem_mode,
+            options.machine_type, bm[0],
+            bare_metal=options.bare_metal)
+    setWorkCountOptions(test_sys, options)
 else:
     fatal("incapable of building non-alpha or non-sparc full system!")
 
@@ -144,24 +148,31 @@ if options.kernel is not None:
 if options.script is not None:
     test_sys.readfile = options.script
 
-test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
+test_sys.init_param = options.init_param
 
-CacheConfig.config_cache(options, test_sys)
+test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
 
+if bm[0]:
+    mem_size = bm[0].mem()
+else:
+    mem_size = SysConfig().mem()
 if options.caches or options.l2cache:
-    if bm[0]:
-        mem_size = bm[0].mem()
-    else:
-        mem_size = SysConfig().mem()
-    test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)]
-    test_sys.bridge.filter_ranges_b=[AddrRange(mem_size)]
-    test_sys.iocache = IOCache(addr_range=mem_size)
-    test_sys.iocache.cpu_side = test_sys.iobus.port
-    test_sys.iocache.mem_side = test_sys.membus.port
+    test_sys.iocache = IOCache(addr_ranges=[mem_size])
+    test_sys.iocache.cpu_side = test_sys.iobus.master
+    test_sys.iocache.mem_side = test_sys.membus.slave
+else:
+    test_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
+                               ranges = [test_sys.physmem.range])
+    test_sys.iobridge.slave = test_sys.iobus.master
+    test_sys.iobridge.master = test_sys.membus.slave
 
 for i in xrange(np):
     if options.fastmem:
         test_sys.cpu[i].physmem_port = test_sys.physmem.port
+    if options.checker:
+        test_sys.cpu[i].addCheckerCpu()
+
+CacheConfig.config_cache(options, test_sys)
 
 if buildEnv['TARGET_ISA'] == 'mips':
     setMipsOptions(TestCPUClass)
@@ -176,17 +187,24 @@ if len(bm) == 2:
     elif buildEnv['TARGET_ISA'] == 'x86':
         drive_sys = makeX86System(drive_mem_mode, np, bm[1])
     elif buildEnv['TARGET_ISA'] == 'arm':
-        drive_sys = makeLinuxArmSystem(drive_mem_mode, bm[1])
+        drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
+
     drive_sys.cpu = DriveCPUClass(cpu_id=0)
-    drive_sys.cpu.connectMemPorts(drive_sys.membus)
+    drive_sys.cpu.createInterruptController()
+    drive_sys.cpu.connectAllPorts(drive_sys.membus)
     if options.fastmem:
         drive_sys.cpu.physmem_port = drive_sys.physmem.port
     if options.kernel is not None:
         drive_sys.kernel = binary(options.kernel)
+    drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
+                               ranges = [drive_sys.physmem.range])
+    drive_sys.iobridge.slave = drive_sys.iobus.master
+    drive_sys.iobridge.master = drive_sys.membus.slave
 
-    root = makeDualRoot(test_sys, drive_sys, options.etherdump)
+    drive_sys.init_param = options.init_param
+    root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
 elif len(bm) == 1:
-    root = Root(system=test_sys)
+    root = Root(full_system=True, system=test_sys)
 else:
     print "Error I don't know how to create more than 2 systems."
     sys.exit(1)
@@ -194,4 +212,7 @@ else:
 if options.timesync:
     root.time_sync_enable = True
 
+if options.frame_capture:
+    VncServer.frame_capture = True
+
 Simulation.run(options, root, test_sys, FutureClass)