-# Copyright (c) 2010-2013, 2016, 2019 ARM Limited
+# Copyright (c) 2010-2013, 2016, 2019-2020 ARM Limited
+# Copyright (c) 2020 Barkhausen Institut
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Ali Saidi
-# Brad Beckmann
from __future__ import print_function
from __future__ import absolute_import
test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0], cmdline=cmdline)
elif buildEnv['TARGET_ISA'] == "sparc":
test_sys = makeSparcSystem(test_mem_mode, bm[0], cmdline=cmdline)
+ elif buildEnv['TARGET_ISA'] == "riscv":
+ test_sys = makeBareMetalRiscvSystem(test_mem_mode, bm[0],
+ cmdline=cmdline)
elif buildEnv['TARGET_ISA'] == "x86":
test_sys = makeLinuxX86System(test_mem_mode, np, bm[0], options.ruby,
cmdline=cmdline)
voltage_domain =
test_sys.cpu_voltage_domain)
- if options.kernel is not None:
- test_sys.kernel = binary(options.kernel)
+ if buildEnv['TARGET_ISA'] == 'riscv':
+ test_sys.workload.bootloader = options.kernel
+ elif options.kernel is not None:
+ test_sys.workload.object_file = binary(options.kernel)
if options.script is not None:
test_sys.readfile = options.script
drive_sys.cpu.createInterruptController()
drive_sys.cpu.connectAllPorts(drive_sys.membus)
if options.kernel is not None:
- drive_sys.kernel = binary(options.kernel)
+ drive_sys.workload.object_file = binary(options.kernel)
if ObjectList.is_kvm_cpu(DriveCPUClass):
drive_sys.kvm_vm = KvmVM()
if buildEnv['TARGET_ISA'] == "arm" and not options.bare_metal \
and not options.dtb_filename:
- if options.machine_type not in ["VExpress_GEM5", "VExpress_GEM5_V1"]:
- warn("Can only correctly generate a dtb for VExpress_GEM5_V1 " \
+ if options.machine_type not in ["VExpress_GEM5",
+ "VExpress_GEM5_V1",
+ "VExpress_GEM5_V2",
+ "VExpress_GEM5_Foundation"]:
+ warn("Can only correctly generate a dtb for VExpress_GEM5_* " \
"platforms, unless custom hardware models have been equipped "\
"with generation functionality.")
for sysname in ('system', 'testsys', 'drivesys'):
if hasattr(root, sysname):
sys = getattr(root, sysname)
- sys.generateDtb(m5.options.outdir, '%s.dtb' % sysname)
+ sys.workload.dtb_filename = \
+ os.path.join(m5.options.outdir, '%s.dtb' % sysname)
+ sys.generateDtb(sys.workload.dtb_filename)
Simulation.setWorkCountOptions(test_sys, options)
Simulation.run(options, root, test_sys, FutureClass)