X86, Config: Move the setting of work count options to a separate function.

[gem5.git] / configs / example / ruby_fs.py

diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
index b6d9a6c0a20917b92b587a0f6649772c9997f3d6..adc8e6147739df7e230683d61fbfe5fadc0fe6bb 100644 (file)
--- a/configs/example/ruby_fs.py
+++ b/configs/example/ruby_fs.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009 Advanced Micro Devices, Inc.
+# Copyright (c) 2009-2011 Advanced Micro Devices, Inc.
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -103,19 +103,26 @@ else:
 # fast forward with the atomic cpu and instead set the FutureClass to None.
 # Therefore the cpus resolve to the correct names and unserialize correctly.
 #
-assert(options.timing)
 class CPUClass(TimingSimpleCPU): pass
 test_mem_mode = 'timing'
 FutureClass = None
 
 CPUClass.clock = options.clock
 
-system = makeLinuxAlphaRubySystem(test_mem_mode, bm[0])
-
-system.ruby = Ruby.create_system(options,
-                                 system.physmem,
-                                 system.piobus,
-                                 system.dma_devices)
+if buildEnv['TARGET_ISA'] == "alpha":
+    system = makeLinuxAlphaRubySystem(test_mem_mode, bm[0])
+    system.ruby = Ruby.create_system(options,
+                                     system,
+                                     system.piobus,
+                                     system.dma_devices)
+elif buildEnv['TARGET_ISA'] == "x86":
+    system = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0], True)
+    setWorkCountOptions(system, options)
+    system.ruby = Ruby.create_system(options,
+                                     system,
+                                     system.piobus)
+else:
+    fatal("incapable of building non-alpha or non-x86 full system!")
 
 system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
 
@@ -125,6 +132,11 @@ for (i, cpu) in enumerate(system.cpu):
     #
     cpu.icache_port = system.ruby.cpu_ruby_ports[i].port
     cpu.dcache_port = system.ruby.cpu_ruby_ports[i].port
+    if buildEnv['TARGET_ISA'] == "x86":
+        cpu.itb.walker.port = system.ruby.cpu_ruby_ports[i].port
+        cpu.dtb.walker.port = system.ruby.cpu_ruby_ports[i].port
+        cpu.interrupts.pio = system.piobus.port
+        cpu.interrupts.int_port = system.piobus.port
 
 root = Root(system = system)