Add an I/O cache to FS config even if there's just an "L2" cache.

[gem5.git] / configs / example / se.py

diff --git a/configs/example/se.py b/configs/example/se.py
index 0944a030e8a5bd72da2ce6b8a7681f767e0a0ad6..67a2340cee2a2cded50ea667c5d74f8dffc6e83e 100644 (file)
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2008 The Regents of The University of Michigan
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -31,11 +31,17 @@
 # "m5 test.py"
 
 import m5
+
+if m5.build_env['FULL_SYSTEM']:
+    m5.fatal("This script requires syscall emulation mode (*_SE).")
+
 from m5.objects import *
 import os, optparse, sys
+from os.path import join as joinpath
 m5.AddToPath('../common')
 import Simulation
 from Caches import *
+from cpu2000 import *
 
 # Get paths we might need.  It's expected this file is in m5/configs/example.
 config_path = os.path.dirname(os.path.abspath(__file__))
@@ -46,13 +52,13 @@ parser = optparse.OptionParser()
 
 # Benchmark options
 parser.add_option("-c", "--cmd",
-                  default=os.path.join(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"),
-                  help="The binary to run in syscall emulation mode.")
+    default=joinpath(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"),
+    help="The binary to run in syscall emulation mode.")
 parser.add_option("-o", "--options", default="",
-                  help="The options to pass to the binary, use \" \" around the entire\
-                        string.")
-parser.add_option("-i", "--input", default="",
-                  help="A file of input to give to the binary.")
+    help='The options to pass to the binary, use " " around the entire string')
+parser.add_option("-i", "--input", default="", help="Read stdin from a file.")
+parser.add_option("--output", default="", help="Redirect stdout to a file.")
+parser.add_option("--errout", default="", help="Redirect stderr to a file.")
 
 execfile(os.path.join(config_root, "common", "Options.py"))
 
@@ -62,11 +68,32 @@ if args:
     print "Error: script doesn't take any positional arguments"
     sys.exit(1)
 
-process = LiveProcess()
-process.executable = options.cmd
-process.cmd = options.cmd + " " + options.options
+if options.bench:
+    try:
+        if m5.build_env['TARGET_ISA'] != 'alpha':
+            print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time"
+            sys.exit(1)
+        exec("workload = %s('alpha', 'tru64', 'ref')" % options.bench)
+        process = workload.makeLiveProcess()
+    except:
+        print >>sys.stderr, "Unable to find workload for %s" % options.bench
+        sys.exit(1)
+else:
+    process = LiveProcess()
+    process.executable = options.cmd
+    process.cmd = [options.cmd] + options.options.split()
+
+
 if options.input != "":
     process.input = options.input
+if options.output != "":
+    process.output = options.output
+if options.errout != "":
+    process.errout = options.errout
+
+
+# By default, set workload to path of user-specified binary
+workloads = options.cmd
 
 if options.detailed:
     #check for SMT workload
@@ -75,9 +102,15 @@ if options.detailed:
         process = []
         smt_idx = 0
         inputs = []
+        outputs = []
+        errouts = []
 
         if options.input != "":
             inputs = options.input.split(';')
+        if options.output != "":
+            outputs = options.output.split(';')
+        if options.errout != "":
+            errouts = options.errout.split(';')
 
         for wrkld in workloads:
             smt_process = LiveProcess()
@@ -85,12 +118,17 @@ if options.detailed:
             smt_process.cmd = wrkld + " " + options.options
             if inputs and inputs[smt_idx]:
                 smt_process.input = inputs[smt_idx]
+            if outputs and outputs[smt_idx]:
+                smt_process.output = outputs[smt_idx]
+            if errouts and errouts[smt_idx]:
+                smt_process.errout = errouts[smt_idx]
             process += [smt_process, ]
             smt_idx += 1
 
 (CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
 
 CPUClass.clock = '2GHz'
+CPUClass.numThreads = len(workloads)
 
 np = options.num_cpus
 
@@ -100,13 +138,25 @@ system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
 
 system.physmem.port = system.membus.port
 
+if options.l2cache:
+    system.l2 = L2Cache(size='2MB')
+    system.tol2bus = Bus()
+    system.l2.cpu_side = system.tol2bus.port
+    system.l2.mem_side = system.membus.port
+
 for i in xrange(np):
     if options.caches:
         system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
                                               L1Cache(size = '64kB'))
-    system.cpu[i].connectMemPorts(system.membus)
+    if options.l2cache:
+        system.cpu[i].connectMemPorts(system.tol2bus)
+    else:
+        system.cpu[i].connectMemPorts(system.membus)
     system.cpu[i].workload = process
 
+    if options.fastmem:
+        system.cpu[0].physmem_port = system.physmem.port
+
 root = Root(system = system)
 
 Simulation.run(options, root, system, FutureClass)