mem: Make MemCtrl a ClockedObject

[gem5.git] / configs / learning_gem5 / part1 / simple.py

diff --git a/configs/learning_gem5/part1/simple.py b/configs/learning_gem5/part1/simple.py
index ef73a06ee1dc799d716d0c566e9c69f25cf43f7b..cfd15bebb1540522fbe65bf2da9ea6ad15536dbe 100644 (file)
--- a/configs/learning_gem5/part1/simple.py
+++ b/configs/learning_gem5/part1/simple.py
@@ -77,8 +77,9 @@ if m5.defines.buildEnv['TARGET_ISA'] == "x86":
     system.cpu.interrupts[0].int_slave = system.membus.master
 
 # Create a DDR3 memory controller and connect it to the membus
-system.mem_ctrl = DDR3_1600_8x8()
-system.mem_ctrl.range = system.mem_ranges[0]
+system.mem_ctrl = DRAMCtrl()
+system.mem_ctrl.dram = DDR3_1600_8x8()
+system.mem_ctrl.dram.range = system.mem_ranges[0]
 system.mem_ctrl.port = system.membus.master
 
 # Connect the system up to the membus