ruby: message buffers: significant changes

[gem5.git] / configs / ruby / MESI_Two_Level.py

diff --git a/configs/ruby/MESI_Two_Level.py b/configs/ruby/MESI_Two_Level.py
index c70c599c7a45df205f4124d3da23965c6f401ccc..8d75fe22e541e423c17f3a5a0c243a3e4055f04b 100644 (file)
--- a/configs/ruby/MESI_Two_Level.py
+++ b/configs/ruby/MESI_Two_Level.py
@@ -108,12 +108,19 @@ def create_system(options, system, dma_ports, ruby_system):
         l1_cntrl.sequencer = cpu_seq
         exec("ruby_system.l1_cntrl%d = l1_cntrl" % i)
 
-        #
         # Add controllers and sequencers to the appropriate lists
-        #
         cpu_sequencers.append(cpu_seq)
         l1_cntrl_nodes.append(l1_cntrl)
 
+        # Connect the L1 controllers and the network
+        l1_cntrl.requestFromL1Cache =  ruby_system.network.slave
+        l1_cntrl.responseFromL1Cache =  ruby_system.network.slave
+        l1_cntrl.unblockFromL1Cache =  ruby_system.network.slave
+
+        l1_cntrl.requestToL1Cache =  ruby_system.network.master
+        l1_cntrl.responseToL1Cache =  ruby_system.network.master
+
+
     l2_index_start = block_size_bits + l2_bits
 
     for i in xrange(options.num_l2caches):
@@ -132,10 +139,21 @@ def create_system(options, system, dma_ports, ruby_system):
         exec("ruby_system.l2_cntrl%d = l2_cntrl" % i)
         l2_cntrl_nodes.append(l2_cntrl)
 
+        # Connect the L2 controllers and the network
+        l2_cntrl.DirRequestFromL2Cache = ruby_system.network.slave
+        l2_cntrl.L1RequestFromL2Cache = ruby_system.network.slave
+        l2_cntrl.responseFromL2Cache = ruby_system.network.slave
+
+        l2_cntrl.unblockToL2Cache = ruby_system.network.master
+        l2_cntrl.L1RequestToL2Cache = ruby_system.network.master
+        l2_cntrl.responseToL2Cache = ruby_system.network.master
+
+
     phys_mem_size = sum(map(lambda r: r.size(), system.mem_ranges))
     assert(phys_mem_size % options.num_dirs == 0)
     mem_module_size = phys_mem_size / options.num_dirs
 
+
     # Run each of the ruby memory controllers at a ratio of the frequency of
     # the ruby system
     # clk_divider value is a fix to pass regression.
@@ -169,10 +187,14 @@ def create_system(options, system, dma_ports, ruby_system):
         exec("ruby_system.dir_cntrl%d = dir_cntrl" % i)
         dir_cntrl_nodes.append(dir_cntrl)
 
+        # Connect the directory controllers and the network
+        dir_cntrl.requestToDir = ruby_system.network.master
+        dir_cntrl.responseToDir = ruby_system.network.master
+        dir_cntrl.responseFromDir = ruby_system.network.slave
+
+
     for i, dma_port in enumerate(dma_ports):
-        #
         # Create the Ruby objects associated with the dma controller
-        #
         dma_seq = DMASequencer(version = i,
                                ruby_system = ruby_system)
 
@@ -185,6 +207,11 @@ def create_system(options, system, dma_ports, ruby_system):
         exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
+        # Connect the dma controller to the network
+        dma_cntrl.responseFromDir = ruby_system.network.master
+        dma_cntrl.requestToDir = ruby_system.network.slave
+
+
     all_cntrls = l1_cntrl_nodes + \
                  l2_cntrl_nodes + \
                  dir_cntrl_nodes + \