mem-ruby: Sequencer can be used without cache
[gem5.git] / configs / ruby / MOESI_AMD_Base.py
index 5b2d912ddf00fb6b90aec82abeaff95a4521fed9..eb008ea580720d563f39769d5f7430a93364208d 100644 (file)
@@ -34,8 +34,8 @@ import m5
 from m5.objects import *
 from m5.defines import buildEnv
 from m5.util import addToPath
-from Ruby import create_topology
-from Ruby import send_evicts
+from .Ruby import create_topology
+from .Ruby import send_evicts
 from common import FileSystemConfig
 
 addToPath('../')
@@ -101,7 +101,6 @@ class CPCntrl(CorePair_Controller, CntrlBase):
 
         self.sequencer = RubySequencer()
         self.sequencer.version = self.seqCount()
-        self.sequencer.icache = self.L1Icache
         self.sequencer.dcache = self.L1D0cache
         self.sequencer.ruby_system = ruby_system
         self.sequencer.coreid = 0
@@ -109,7 +108,6 @@ class CPCntrl(CorePair_Controller, CntrlBase):
 
         self.sequencer1 = RubySequencer()
         self.sequencer1.version = self.seqCount()
-        self.sequencer1.icache = self.L1Icache
         self.sequencer1.dcache = self.L1D1cache
         self.sequencer1.ruby_system = ruby_system
         self.sequencer1.coreid = 1
@@ -277,6 +275,8 @@ def create_system(options, full_system, system, dma_devices, bootmem,
 
         dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
         dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
+
+        dir_cntrl.requestToMemory = MessageBuffer()
         dir_cntrl.responseFromMemory = MessageBuffer()
 
         exec("system.dir_cntrl%d = dir_cntrl" % i)
@@ -326,16 +326,16 @@ def create_system(options, full_system, system, dma_devices, bootmem,
 
     # Register CPUs and caches for each CorePair and directory (SE mode only)
     if not full_system:
-        for i in xrange((options.num_cpus + 1) // 2):
+        for i in range((options.num_cpus + 1) // 2):
             FileSystemConfig.register_cpu(physical_package_id = 0,
                                           core_siblings =
-                                            xrange(options.num_cpus),
+                                            range(options.num_cpus),
                                           core_id = i*2,
                                           thread_siblings = [])
 
             FileSystemConfig.register_cpu(physical_package_id = 0,
                                           core_siblings =
-                                            xrange(options.num_cpus),
+                                            range(options.num_cpus),
                                           core_id = i*2+1,
                                           thread_siblings = [])
 
@@ -374,7 +374,7 @@ def create_system(options, full_system, system, dma_devices, bootmem,
                                             line_size = options.cacheline_size,
                                             assoc = options.l3_assoc,
                                             cpus = [n for n in
-                                                xrange(options.num_cpus)])
+                                                range(options.num_cpus)])
 
     # Assuming no DMA devices
     assert(len(dma_devices) == 0)