/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2002-2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
int maxThreadsPerCPU = 1;
#ifdef FULL_SYSTEM
-BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
+BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
Counter max_insts_any_thread,
Counter max_insts_all_threads,
Counter max_loads_any_thread,
Counter max_loads_all_threads,
System *_system, Tick freq)
- : SimObject(_name), frequency(freq),
+ : SimObject(_name), frequency(freq), deferRegistration(_def_reg),
number_of_threads(_number_of_threads), system(_system)
#else
-BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
+BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
Counter max_insts_any_thread,
Counter max_insts_all_threads,
Counter max_loads_any_thread,
Counter max_loads_all_threads)
- : SimObject(_name), number_of_threads(_number_of_threads)
+ : SimObject(_name), deferRegistration(_def_reg),
+ number_of_threads(_number_of_threads)
#endif
{
// add self to global list of CPUs
#endif
}
+void
+BaseCPU::init()
+{
+ if (!deferRegistration)
+ registerExecContexts();
+}
void
BaseCPU::regStats()
{
+ using namespace Stats;
+
+ numCycles
+ .name(name() + ".numCycles")
+ .desc("number of cpu cycles simulated")
+ ;
+
int size = execContexts.size();
if (size > 1) {
for (int i = 0; i < size; ++i) {
newXC->takeOverFrom(oldXC);
assert(newXC->cpu_id == oldXC->cpu_id);
#ifdef FULL_SYSTEM
- system->replaceExecContext(newXC->cpu_id, newXC);
+ system->replaceExecContext(newXC, newXC->cpu_id);
#else
assert(newXC->process == oldXC->process);
- newXC->process->replaceExecContext(newXC->cpu_id, newXC);
+ newXC->process->replaceExecContext(newXC, newXC->cpu_id);
#endif
}
intstatus = 0;
}
+
+void
+BaseCPU::serialize(std::ostream &os)
+{
+ SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
+ SERIALIZE_SCALAR(intstatus);
+}
+
+void
+BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
+ UNSERIALIZE_SCALAR(intstatus);
+}
+
#endif // FULL_SYSTEM
DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)