}
template <class Impl>
-BaseDynInst<Impl>::BaseDynInst(StaticInstPtr<ISA> &_staticInst)
+BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
: staticInst(_staticInst), traceData(NULL)
{
initVars();
asid = 0;
// Initialize the fault to be unimplemented opcode.
- fault = Unimplemented_Opcode_Fault;
+ fault = UnimplementedOpcodeFault;
++instcount;
req->asid = asid;
// Prefetches never cause faults.
- fault = No_Fault;
+ fault = NoFault;
// note this is a local, not BaseDynInst::fault
Fault trans_fault = xc->translateDataReadReq(req);
- if (trans_fault == No_Fault && !(req->flags & UNCACHEABLE)) {
+ if (trans_fault == NoFault && !(req->flags & UNCACHEABLE)) {
// It's a valid address to cacheable space. Record key MemReq
// parameters so we can generate another one just like it for
// the timing access without calling translate() again (which
* Replace the disjoint functional memory with a unified one and remove
* this hack.
*/
-#ifndef FULL_SYSTEM
+#if !FULL_SYSTEM
req->paddr = req->vaddr;
#endif
fault = xc->translateDataWriteReq(req);
- if (fault == No_Fault && !(req->flags & UNCACHEABLE)) {
+ if (fault == NoFault && !(req->flags & UNCACHEABLE)) {
// Record key MemReq parameters so we can generate another one
// just like it for the timing access without calling translate()
// again (which might mess up the TLB).
// translate to physical address
Fault fault = xc->translateDataReadReq(req);
- if (fault == No_Fault) {
+ if (fault == NoFault) {
xc->copySrcAddr = src;
xc->copySrcPhysAddr = req->paddr;
} else {
// translate to physical address
Fault fault = xc->translateDataWriteReq(req);
- if (fault == No_Fault) {
+ if (fault == NoFault) {
Addr dest_addr = req->paddr;
// Need to read straight from memory since we have more than 8 bytes.
req->paddr = xc->copySrcPhysAddr;
#if 0
panic("unaligned access. Cycle = %n", curTick);
#endif
- return No_Fault;
+ return NoFault;
}
MemReqPtr req = new MemReq(addr, thread, nbytes);
case Write:
fault = spec_mem->write(req, (uint8_t *)p);
- if (fault != No_Fault)
+ if (fault != NoFault)
break;
specMemWrite = true;
break;
default:
- fault = Machine_Check_Fault;
+ fault = MachineCheckFault;
break;
}