Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5

[gem5.git] / cpu / exec_context.hh

diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 4f62fa6fae6c2477d9a24f882b078763bee610cd..8437a558541887aa3b38087361dcca57bdfd48a4 100644 (file)
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2001-2004 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -31,6 +31,7 @@
 
 #include "sim/host.hh"
 #include "mem/mem_req.hh"
+#include "mem/functional_mem/functional_memory.hh"
 #include "sim/serialize.hh"
 #include "targetarch/byte_swap.hh"
 
@@ -41,12 +42,12 @@ class BaseCPU;
 
 #ifdef FULL_SYSTEM
 
+#include "sim/system.hh"
 #include "targetarch/alpha_memory.hh"
-class MemoryController;
 
-#include "kern/tru64/kernel_stats.hh"
-#include "sim/system.hh"
-#include "sim/sw_context.hh"
+class MemoryController;
+class StaticInstBase;
+namespace Kernel { class Binning; class Statistics; }
 
 #else // !FULL_SYSTEM
 
@@ -104,17 +105,15 @@ class ExecContext
     /// Set the status to Halted.
     void halt();
 
-#ifdef FULL_SYSTEM
-  public:
-    KernelStats kernelStats;
-#endif
-
   public:
     RegFile regs;      // correct-path register context
 
     // pointer to CPU associated with this context
     BaseCPU *cpu;
 
+    // Current instruction
+    MachInst inst;
+
     // Index of hardware thread context on the CPU that this represents.
     int thread_num;
 
@@ -123,7 +122,6 @@ class ExecContext
     int cpu_id;
 
 #ifdef FULL_SYSTEM
-
     FunctionalMemory *mem;
     AlphaITB *itb;
     AlphaDTB *dtb;
@@ -132,10 +130,15 @@ class ExecContext
     // the following two fields are redundant, since we can always
     // look them up through the system pointer, but we'll leave them
     // here for now for convenience
-    MemoryController *memCtrl;
+    MemoryController *memctrl;
     PhysicalMemory *physmem;
 
-    SWContext *swCtx;
+    Kernel::Binning *kernelBinning;
+    Kernel::Statistics *kernelStats;
+    bool bin;
+    bool fnbin;
+    void execute(const StaticInstBase *inst);
+
 #else
     Process *process;
 
@@ -181,7 +184,7 @@ class ExecContext
     ExecContext(BaseCPU *_cpu, int _thread_num, FunctionalMemory *_mem,
                 int _asid);
 #endif
-    virtual ~ExecContext() {}
+    virtual ~ExecContext();
 
     virtual void takeOverFrom(ExecContext *oldContext);
 
@@ -193,8 +196,8 @@ class ExecContext
 #ifdef FULL_SYSTEM
     bool validInstAddr(Addr addr) { return true; }
     bool validDataAddr(Addr addr) { return true; }
-    int getInstAsid() { return ITB_ASN_ASN(regs.ipr[TheISA::IPR_ITB_ASN]); }
-    int getDataAsid() { return DTB_ASN_ASN(regs.ipr[TheISA::IPR_DTB_ASN]); }
+    int getInstAsid() { return regs.instAsid(); }
+    int getDataAsid() { return regs.dataAsid(); }
 
     Fault translateInstReq(MemReqPtr &req)
     {
@@ -316,6 +319,18 @@ class ExecContext
     virtual bool misspeculating();
 
 
+    MachInst getInst() { return inst; }
+
+    void setInst(MachInst new_inst)
+    {
+        inst = new_inst;
+    }
+
+    Fault instRead(MemReqPtr &req)
+    {
+        return mem->read(req, inst);
+    }
+
     //
     // New accessors for new decoder.
     //
@@ -395,11 +410,19 @@ class ExecContext
     int readIntrFlag() { return regs.intrflag; }
     void setIntrFlag(int val) { regs.intrflag = val; }
     Fault hwrei();
-    bool inPalMode() { return PC_PAL(regs.pc); }
+    bool inPalMode() { return AlphaISA::PcPAL(regs.pc); }
     void ev5_trap(Fault fault);
     bool simPalCheck(int palFunc);
 #endif
 
+    /** Meant to be more generic trap function to be
+     *  called when an instruction faults.
+     *  @param fault The fault generated by executing the instruction.
+     *  @todo How to do this properly so it's dependent upon ISA only?
+     */
+
+    void trap(Fault fault);
+
 #ifndef FULL_SYSTEM
     IntReg getSyscallArg(int i)
     {