/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2001-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
namespace Trace {
-#if 0
- static const FlagVec ALL = ULL(0x1);
- static const FlagVec FULL = ULL(0x2);
- static const FlagVec SYMBOLS = ULL(0x4);
- static const FlagVec EXTENDED = ULL(0x8);
- static const FlagVec BRANCH_TAKEN = ULL(0x10);
- static const FlagVec BRANCH_NOTTAKEN = ULL(0x20);
- static const FlagVec CALLPAL = ULL(0x40);
- static const FlagVec SPECULATIVE = ULL(0x100);
- static const FlagVec OMIT_COUNT = ULL(0x200);
- static const FlagVec INCLUDE_THREAD_NUM = ULL(0x400);
-#endif
-
class InstRecord : public Record
{
protected:
bool regs_valid;
public:
- InstRecord(Tick _cycle, BaseCPU *_cpu, StaticInstPtr<TheISA> _staticInst,
- Addr _pc, bool spec, unsigned _thread)
+ InstRecord(Tick _cycle, BaseCPU *_cpu,
+ const StaticInstPtr<TheISA> &_staticInst,
+ Addr _pc, bool spec, int _thread)
: Record(_cycle), cpu(_cpu), staticInst(_staticInst), PC(_pc),
misspeculating(spec), thread(_thread)
{
PRINT_INT_REGS,
PRINT_FETCH_SEQ,
PRINT_CP_SEQ,
+ INTEL_FORMAT,
NUM_BITS
};
static std::vector<bool> flags;
+ static std::string trace_system;
static void setParams();