Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5

[gem5.git] / cpu / static_inst.cc

diff --git a/cpu/static_inst.cc b/cpu/static_inst.cc
index 7069d89ec6a78fd35a3f3f170f0fe57148b74768..c307dc6fcf912fcb5ac67fa8fb1d87b9dcb652aa 100644 (file)
--- a/cpu/static_inst.cc
+++ b/cpu/static_inst.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -28,21 +28,15 @@
 
 #include <iostream>
 #include "cpu/static_inst.hh"
-#include "sim/universe.hh"
+#include "sim/root.hh"
 
-template <class ISA>
-StaticInstPtr<ISA> StaticInst<ISA>::nullStaticInstPtr;
-
-template <class ISA>
-typename StaticInst<ISA>::DecodeCache StaticInst<ISA>::decodeCache;
+StaticInstPtr StaticInst::nullStaticInstPtr;
 
 // Define the decode cache hash map.
-template StaticInst<AlphaISA>::DecodeCache
-StaticInst<AlphaISA>::decodeCache;
+StaticInst::DecodeCache StaticInst::decodeCache;
 
-template <class ISA>
 void
-StaticInst<ISA>::dumpDecodeCacheStats()
+StaticInst::dumpDecodeCacheStats()
 {
     using namespace std;
 
@@ -62,13 +56,8 @@ StaticInst<ISA>::dumpDecodeCacheStats()
     }
 }
 
-
-template StaticInstPtr<AlphaISA>
-StaticInst<AlphaISA>::nullStaticInstPtr;
-
-template <class ISA>
 bool
-StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt)
+StaticInst::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) const
 {
     if (isDirectCtrl()) {
         tgt = branchTarget(pc);
@@ -83,6 +72,3 @@ StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt)
     return false;
 }
 
-
-// force instantiation of template function(s) above
-template class StaticInst<AlphaISA>;