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[gem5.git] / cpu / static_inst.hh

diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 3ac88fd3d65fb24758f3d5f9b880f7be3116911b..85cfb5ae786c8be1b9b9924ef3515526a46bc984 100644 (file)
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003-2004 The Regents of The University of Michigan
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -32,25 +32,20 @@
 #include <bitset>
 #include <string>
 
-#include "sim/host.hh"
 #include "base/hashmap.hh"
 #include "base/refcnt.hh"
-
-#include "cpu/full_cpu/op_class.hh"
+#include "encumbered/cpu/full/op_class.hh"
+#include "sim/host.hh"
 #include "targetarch/isa_traits.hh"
 
 // forward declarations
 struct AlphaSimpleImpl;
-struct OoOImpl;
 class ExecContext;
 class DynInst;
 
 template <class Impl>
 class AlphaDynInst;
 
-template <class Impl>
-class OoODynInst;
-
 class FastCPU;
 class SimpleCPU;
 class InorderCPU;
@@ -260,7 +255,7 @@ class StaticInst : public StaticInstBase
      * obtain the dependence info (numSrcRegs and srcRegIdx[]) for
      * just the EA computation.
      */
-    virtual
+    virtual const
     StaticInstPtr<ISA> &eaCompInst() const { return nullStaticInstPtr; }
 
     /**
@@ -269,7 +264,7 @@ class StaticInst : public StaticInstBase
      * obtain the dependence info (numSrcRegs and srcRegIdx[]) for
      * just the memory access (not the EA computation).
      */
-    virtual
+    virtual const
     StaticInstPtr<ISA> &memAccInst() const { return nullStaticInstPtr; }
 
     /// The binary machine instruction.