(no commit message)

[libreriscv.git] / crypto_router_asic.mdwn

diff --git a/crypto_router_asic.mdwn b/crypto_router_asic.mdwn
index 24191cefb8bcd4e7d855846d12f270d4d8d20d89..c91744b12f6133fb85a1625b483c050d38c5076d 100644 (file)
--- a/crypto_router_asic.mdwn
+++ b/crypto_router_asic.mdwn
@@ -12,7 +12,9 @@ All of these are entirely Libre-Licensed or are to be written as Libre-Licensed:
   OpenPOWER CPU with
   [[openpower/sv/bitmanip]] extensions
 * 180/130 nm (TBD)
-* 5x [[shakti/m_class/RGMII]] Gigabit Ethernet PHYs
+* 5x [[shakti/m_class/RGMII]] Gigabit Ethernet PHYs with
+  [SRAM](https://github.com/adamgreig/daqnet/blob/master/gateware/daqnet/ethernet/rmii.py)
+   on-chip, built-in.
 * 2x USB [[shakti/m_class/ULPI]] PHYs
 * Direct DMA interface (independent bulk transfer)
 * [JTAG](https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/debug/jtag.py;hb=HEAD),