Compute gdb command timeout based on ops estimate

[riscv-tests.git] / debug / gdbserver.py

diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index bf279503ecb41c921ec82695de213ebac45c9642..d085e2ef60df5a3a2bc2fc1efb547cb4a9fc69ae 100755 (executable)
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -136,6 +136,19 @@ class SimpleF18Test(SimpleRegisterTest):
     def test(self):
         self.check_reg("f18", "fs2")
 
+class SimpleNoExistTest(GdbTest):
+    def test(self):
+        try:
+            self.gdb.p("$csr2288")
+            assert False, "Reading csr2288 should have failed"
+        except testlib.CouldNotFetch:
+            pass
+        try:
+            self.gdb.p("$csr2288=5")
+            assert False, "Writing csr2288 should have failed"
+        except testlib.CouldNotFetch:
+            pass
+
 class SimpleMemoryTest(GdbTest):
     def access_test(self, size, data_type):
         assertEqual(self.gdb.p("sizeof(%s)" % data_type), size)
@@ -660,12 +673,17 @@ class TriggerLoadAddressInstant(TriggerTest):
         self.gdb.command("b just_before_read_loop")
         self.gdb.c()
         read_loop = self.gdb.p("&read_loop")
+        read_again = self.gdb.p("&read_again")
         self.gdb.command("rwatch data")
         self.gdb.c()
         # Accept hitting the breakpoint before or after the load instruction.
         assertIn(self.gdb.p("$pc"), [read_loop, read_loop + 4])
         assertEqual(self.gdb.p("$a0"), self.gdb.p("&data"))
 
+        self.gdb.c()
+        assertIn(self.gdb.p("$pc"), [read_again, read_again + 4])
+        assertEqual(self.gdb.p("$a0"), self.gdb.p("&data"))
+
 # FIXME: Triggers aren't quite working yet
 #class TriggerStoreAddress(TriggerTest):
 #    def test(self):
@@ -817,7 +835,7 @@ class DownloadTest(GdbTest):
     def test(self):
         self.gdb.load()
         self.gdb.command("b _exit")
-        self.gdb.c(timeout=60)
+        self.gdb.c()
         assertEqual(self.gdb.p("status"), self.crc)
         os.unlink(self.download_c.name)
 
@@ -855,9 +873,13 @@ class PrivRw(PrivTest):
         """Test reading/writing priv."""
         # Disable physical memory protection by allowing U mode access to all
         # memory.
-        self.gdb.p("$pmpcfg0=0xf")  # TOR, R, W, X
-        self.gdb.p("$pmpaddr0=0x%x" %
-                ((self.hart.ram + self.hart.ram_size) >> 2))
+        try:
+            self.gdb.p("$pmpcfg0=0xf")  # TOR, R, W, X
+            self.gdb.p("$pmpaddr0=0x%x" %
+                    ((self.hart.ram + self.hart.ram_size) >> 2))
+        except testlib.CouldNotFetch:
+            # PMP registers are optional
+            pass
 
         # Leave the PC at _start, where the first 4 instructions should be
         # legal in any mode.