Renamed OpClass enum members: they all end in 'Op' now.

[gem5.git] / dev / alpha_console.hh

diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh
index c39b8e8d4b0a94ef1e7a326a073f01bf4d963b91..b617b64e77e93710c6fdd912b9e0ca9c7430d86f 100644 (file)
--- a/dev/alpha_console.hh
+++ b/dev/alpha_console.hh
@@ -33,9 +33,10 @@
 #ifndef __ALPHA_CONSOLE_HH__
 #define __ALPHA_CONSOLE_HH__
 
-#include "sim/host.hh"
+#include "base/range.hh"
 #include "dev/alpha_access.h"
-#include "mem/functional_mem/mmap_device.hh"
+#include "dev/io_device.hh"
+#include "sim/host.hh"
 
 class BaseCPU;
 class SimConsole;
@@ -68,7 +69,7 @@ class SimpleDisk;
  * primarily used doing boot before the kernel has loaded its device
  * drivers.
  */
-class AlphaConsole : public MmapDevice
+class AlphaConsole : public PioDevice
 {
   protected:
     union {
@@ -82,15 +83,16 @@ class AlphaConsole : public MmapDevice
     /** the system console (the terminal) is accessable from the console */
     SimConsole *console;
 
+    Addr addr;
+    static const Addr size = 0x80; // equal to sizeof(alpha_access);
+
   public:
     /** Standard Constructor */
-    AlphaConsole(const std::string &name, SimConsole *cons,
-                 SimpleDisk *d, int size,
-                 System *system, BaseCPU *cpu,
-                 TlaserClock *clock, int num_cpus,
-                 Addr addr, Addr mask, MemoryController *mmu);
+    AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d,
+                 System *system, BaseCPU *cpu, TlaserClock *clock,
+                 int num_cpus, MemoryController *mmu, Addr addr,
+                 HierParams *hier, Bus *bus);
 
-  public:
     /**
      * memory mapped reads and writes
      */
@@ -102,6 +104,9 @@ class AlphaConsole : public MmapDevice
      */
     virtual void serialize(std::ostream &os);
     virtual void unserialize(Checkpoint *cp, const std::string &section);
+
+  public:
+    Tick cacheAccess(MemReqPtr &req);
 };
 
 #endif // __ALPHA_CONSOLE_HH__