tag each mem_req as coming from the nic if it is DMA'd from the NIC. the NIC tells...

[gem5.git] / dev / ide_ctrl.cc

diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index b25f837239fdef4deb5e1d5833ea3e009de8fff4..4805570d20bbb861545776214cb4ea56318a7e9d 100644 (file)
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -192,6 +192,22 @@ IdeController::getDisk(IdeDisk *diskPtr)
     return -1;
 }
 
+bool
+IdeController::isDiskSelected(IdeDisk *diskPtr)
+{
+    for (int i = 0; i < 4; i++) {
+        if ((long)diskPtr == (long)disks[i]) {
+            // is disk is on primary or secondary channel
+            int channel = i/2;
+            // is disk the master or slave
+            int devID = i%2;
+
+            return (dev[channel] == devID);
+        }
+    }
+    panic("Unable to find disk by pointer!!\n");
+}
+
 ////
 // Command completion
 ////
@@ -255,7 +271,10 @@ IdeController::cacheAccess(MemReqPtr &req)
 void
 IdeController::ReadConfig(int offset, int size, uint8_t *data)
 {
+
+#if TRACING_ON
     Addr origOffset = offset;
+#endif
 
     if (offset < PCI_DEVICE_SPECIFIC) {
         PciDev::ReadConfig(offset, size, data);
@@ -342,12 +361,12 @@ IdeController::WriteConfig(int offset, int size, uint32_t data)
     // (like updating the PIO ranges)
     switch (offset) {
       case PCI_COMMAND:
-        if (config.data[offset] & IOSE)
+        if (config.data[offset] & PCI_CMD_IOSE)
             io_enabled = true;
         else
             io_enabled = false;
 
-        if (config.data[offset] & BME)
+        if (config.data[offset] & PCI_CMD_BME)
             bm_enabled = true;
         else
             bm_enabled = false;
@@ -653,6 +672,18 @@ IdeController::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(io_enabled);
     UNSERIALIZE_SCALAR(bm_enabled);
     UNSERIALIZE_ARRAY(cmd_in_progress, 4);
+
+    if (pioInterface) {
+        pioInterface->addAddrRange(pri_cmd_addr, pri_cmd_addr +
+                                   pri_cmd_size - 1);
+        pioInterface->addAddrRange(pri_ctrl_addr, pri_ctrl_addr +
+                                   pri_ctrl_size - 1);
+        pioInterface->addAddrRange(sec_cmd_addr, sec_cmd_addr +
+                                   sec_cmd_size - 1);
+        pioInterface->addAddrRange(sec_ctrl_addr, sec_ctrl_addr +
+                                   sec_ctrl_size - 1);
+        pioInterface->addAddrRange(bmi_addr, bmi_addr + bmi_size - 1);
+   }
 }
 
 #ifndef DOXYGEN_SHOULD_SKIP_THIS