Merge gblack@m5.eecs.umich.edu:/bk/multiarch

[gem5.git] / dev / isa_fake.cc

diff --git a/dev/isa_fake.cc b/dev/isa_fake.cc
index af8005f9cd3118845acf5f062b988d20e96ad749..2afebbdedfe6fbc87233d927a54d42c8ee81c550 100644 (file)
--- a/dev/isa_fake.cc
+++ b/dev/isa_fake.cc
@@ -45,15 +45,16 @@
 #include "sim/system.hh"
 
 using namespace std;
+using namespace TheISA;
 
 IsaFake::IsaFake(const string &name, Addr a, MemoryController *mmu,
-                         HierParams *hier, Bus *bus, Addr size)
+                         HierParams *hier, Bus *pio_bus, Addr size)
     : PioDevice(name, NULL), addr(a)
 {
     mmu->add_child(this, RangeSize(addr, size));
 
-    if (bus) {
-        pioInterface = newPioInterface(name, hier, bus, this,
+    if (pio_bus) {
+        pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
                                       &IsaFake::cacheAccess);
         pioInterface->addAddrRange(RangeSize(addr, size));
     }
@@ -73,23 +74,23 @@ IsaFake::read(MemReqPtr &req, uint8_t *data)
 
       case sizeof(uint64_t):
          *(uint64_t*)data = 0xFFFFFFFFFFFFFFFFULL;
-         return No_Fault;
+         return NoFault;
       case sizeof(uint32_t):
          *(uint32_t*)data = 0xFFFFFFFF;
-         return No_Fault;
+         return NoFault;
       case sizeof(uint16_t):
          *(uint16_t*)data = 0xFFFF;
-         return No_Fault;
+         return NoFault;
       case sizeof(uint8_t):
          *(uint8_t*)data = 0xFF;
-         return No_Fault;
+         return NoFault;
 
       default:
         panic("invalid access size(?) for PCI configspace!\n");
     }
     DPRINTFN("Isa FakeSMC  ERROR: read  daddr=%#x size=%d\n", daddr, req->size);
 
-    return No_Fault;
+    return NoFault;
 }
 
 Fault
@@ -100,7 +101,7 @@ IsaFake::write(MemReqPtr &req, const uint8_t *data)
 
     //:Addr daddr = (req->paddr & addr_mask) >> 6;
 
-    return No_Fault;
+    return NoFault;
 }
 
 Tick
@@ -113,7 +114,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
 
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    SimObjectParam<Bus*> io_bus;
+    SimObjectParam<Bus*> pio_bus;
     Param<Tick> pio_latency;
     SimObjectParam<HierParams *> hier;
     Param<Addr> size;
@@ -124,7 +125,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake)
 
     INIT_PARAM(mmu, "Memory Controller"),
     INIT_PARAM(addr, "Device Address"),
-    INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+    INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
     INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
     INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
     INIT_PARAM_DFLT(size, "Size of address range", 0x8)
@@ -133,7 +134,7 @@ END_INIT_SIM_OBJECT_PARAMS(IsaFake)
 
 CREATE_SIM_OBJECT(IsaFake)
 {
-    return new IsaFake(getInstanceName(), addr, mmu, hier, io_bus, size);
+    return new IsaFake(getInstanceName(), addr, mmu, hier, pio_bus, size);
 }
 
 REGISTER_SIM_OBJECT("IsaFake", IsaFake)