#define ISR_RXDESC 0x00000002
#define ISR_RXOK 0x00000001
#define ISR_ALL 0x7FFFFFFF
-#define ISR_NODELAY (ISR_ALL & ~(ISR_RXOK|ISR_RXDESC|ISR_TXOK|ISR_TXDESC))
-#define ISR_NOIMPL (~(ISR_SWI|ISR_TXIDLE|ISR_TXDESC|ISR_TXOK|ISR_RXORN| \
- ISR_RXIDLE|ISR_RXDESC|ISR_RXOK))
+#define ISR_DELAY (ISR_TXIDLE|ISR_TXDESC|ISR_TXOK| \
+ ISR_RXIDLE|ISR_RXDESC|ISR_RXOK)
+#define ISR_NODELAY (ISR_ALL & ~ISR_DELAY)
+#define ISR_IMPL (ISR_SWI|ISR_TXIDLE|ISR_TXDESC|ISR_TXOK|ISR_RXORN| \
+ ISR_RXIDLE|ISR_RXDESC|ISR_RXOK)
+#define ISR_NOIMPL (ISR_ALL & ~ISR_IMPL)
/* transmit configuration register */
#define TX_CFG_CSI 0x80000000
#define TANAR_FULL_DUP 0x00000020
#define TANAR_UNUSED 0x00000E1F
-/*
- * descriptor format currently assuming link and bufptr
- * are set for 32 bits,( may be wrong ) ASSUME32
- */
-struct ns_desc {
- uint32_t link; /* link field to next descriptor in linked list */
- uint32_t bufptr; /* pointer to the first fragment or buffer */
- uint32_t cmdsts; /* command/status field */
- uint32_t extsts; /* extended status field for VLAN and IP info */
+/* M5 control register */
+#define M5REG_RESERVED 0xfffffffe
+#define M5REG_DEDICATED 0x00000001
+
+struct ns_desc32 {
+ uint32_t link; /* link field to next descriptor in linked list */
+ uint32_t bufptr; /* pointer to the first fragment or buffer */
+ uint32_t cmdsts; /* command/status field */
+ uint32_t extsts; /* extended status field for VLAN and IP info */
+};
+
+struct ns_desc64 {
+ uint64_t link; /* link field to next descriptor in linked list */
+ uint64_t bufptr; /* pointer to the first fragment or buffer */
+ uint32_t cmdsts; /* command/status field */
+ uint32_t extsts; /* extended status field for VLAN and IP info */
};
/* cmdsts flags for descriptors */