Merge zizzer:/bk/m5

[gem5.git] / dev / ns_gige_reg.h

diff --git a/dev/ns_gige_reg.h b/dev/ns_gige_reg.h
index be53149e7d7bf598f0533da8e1699be2161d09b9..f919ff086f954f76713eee4f8216c17cbc866216 100644 (file)
--- a/dev/ns_gige_reg.h
+++ b/dev/ns_gige_reg.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 The Regents of The University of Michigan
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -171,9 +171,12 @@
 #define ISR_RXDESC     0x00000002
 #define ISR_RXOK       0x00000001
 #define ISR_ALL         0x7FFFFFFF
-#define ISR_NODELAY    (ISR_ALL & ~(ISR_RXOK|ISR_RXDESC|ISR_TXOK|ISR_TXDESC))
-#define ISR_NOIMPL     (~(ISR_SWI|ISR_TXIDLE|ISR_TXDESC|ISR_TXOK|ISR_RXORN| \
-                           ISR_RXIDLE|ISR_RXDESC|ISR_RXOK))
+#define ISR_DELAY      (ISR_TXIDLE|ISR_TXDESC|ISR_TXOK| \
+                         ISR_RXIDLE|ISR_RXDESC|ISR_RXOK)
+#define ISR_NODELAY    (ISR_ALL & ~ISR_DELAY)
+#define ISR_IMPL        (ISR_SWI|ISR_TXIDLE|ISR_TXDESC|ISR_TXOK|ISR_RXORN| \
+                         ISR_RXIDLE|ISR_RXDESC|ISR_RXOK)
+#define ISR_NOIMPL     (ISR_ALL & ~ISR_IMPL)
 
 /* transmit configuration register */
 #define TX_CFG_CSI     0x80000000
@@ -196,12 +199,21 @@
 #define TX_CFG_DRTH_MASK 0x000000ff
 
 /*general purpose I/O control register */
+#define GPIOR_UNUSED           0xffff8000
+#define GPIOR_GP5_IN           0x00004000
+#define GPIOR_GP4_IN           0x00002000
+#define GPIOR_GP3_IN           0x00001000
+#define GPIOR_GP2_IN           0x00000800
+#define GPIOR_GP1_IN           0x00000400
 #define GPIOR_GP5_OE           0x00000200
 #define GPIOR_GP4_OE           0x00000100
 #define GPIOR_GP3_OE           0x00000080
 #define GPIOR_GP2_OE           0x00000040
 #define GPIOR_GP1_OE           0x00000020
+#define GPIOR_GP5_OUT          0x00000010
+#define GPIOR_GP4_OUT          0x00000008
 #define GPIOR_GP3_OUT          0x00000004
+#define GPIOR_GP2_OUT          0x00000002
 #define GPIOR_GP1_OUT          0x00000001
 
 /* receive configuration register */
@@ -283,20 +295,31 @@
 #define TBISR_MR_AN_COMPLETE   0x00000004
 
 /* TBI auto-negotiation advertisement register */
+#define TANAR_NP               0x00008000
+#define TANAR_RF2              0x00002000
+#define TANAR_RF1              0x00001000
 #define TANAR_PS2              0x00000100
 #define TANAR_PS1              0x00000080
-#define TANAR_HALF_DUP                 0x00000040
-#define TANAR_FULL_DUP                 0x00000020
+#define TANAR_HALF_DUP         0x00000040
+#define TANAR_FULL_DUP         0x00000020
+#define TANAR_UNUSED           0x00000E1F
 
-/*
- * descriptor format currently assuming link and bufptr
- * are set for 32 bits,( may be wrong ) ASSUME32
- */
-struct ns_desc {
-  uint32_t link;    /* link field to next descriptor in linked list */
-  uint32_t bufptr;  /* pointer to the first fragment or buffer */
-  uint32_t cmdsts;  /* command/status field */
-  uint32_t extsts;  /* extended status field for VLAN and IP info */
+/* M5 control register */
+#define M5REG_RESERVED         0xfffffffe
+#define M5REG_DEDICATED                0x00000001
+
+struct ns_desc32 {
+    uint32_t link;    /* link field to next descriptor in linked list */
+    uint32_t bufptr;  /* pointer to the first fragment or buffer */
+    uint32_t cmdsts;  /* command/status field */
+    uint32_t extsts;  /* extended status field for VLAN and IP info */
+};
+
+struct ns_desc64 {
+    uint64_t link;    /* link field to next descriptor in linked list */
+    uint64_t bufptr;  /* pointer to the first fragment or buffer */
+    uint32_t cmdsts;  /* command/status field */
+    uint32_t extsts;  /* extended status field for VLAN and IP info */
 };
 
 /* cmdsts flags for descriptors */