Merge saidi@zizzer:/z/m5/Bitkeeper/m5/

[gem5.git] / dev / pciconfigall.cc

diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc
index 85380c75c72ddf910dfcee5ca02de321a19691d7..226fd2749ec57b04087ba0fbe17eef0e2b4bcd11 100644 (file)
--- a/dev/pciconfigall.cc
+++ b/dev/pciconfigall.cc
@@ -1,4 +1,30 @@
-/* $Id$ */
+/*
+ * Copyright (c) 2003 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
 
 /* @file
  * PCI Configspace implementation
@@ -13,20 +39,17 @@
 #include "dev/scsi_ctrl.hh"
 #include "dev/pciconfigall.hh"
 #include "dev/pcidev.hh"
-#include "dev/tsunamireg.h"
-#include "dev/tsunami.hh"
 #include "mem/functional_mem/memory_control.hh"
 #include "sim/builder.hh"
 #include "sim/system.hh"
 
 using namespace std;
 
-PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t,
-                           Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu), tsunami(t)
+PciConfigAll::PciConfigAll(const string &name, Addr a,
+                           MemoryController *mmu)
+    : FunctionalMemory(name), addr(a)
 {
-    //Put back pointer in tsunami
-    tsunami->pciconfig = this;
+    mmu->add_child(this, Range<Addr>(addr, addr + size));
 
     // Make all the pointers to devices null
     for(int x=0; x < MAX_PCI_DEV; x++)
@@ -35,12 +58,12 @@ PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t,
 }
 
 Fault
-PCIConfigAll::read(MemReqPtr &req, uint8_t *data)
+PciConfigAll::read(MemReqPtr &req, uint8_t *data)
 {
-    DPRINTF(PCIConfigAll, "read  va=%#x size=%d\n",
+    DPRINTF(PciConfigAll, "read  va=%#x size=%d\n",
             req->vaddr, req->size);
 
-    Addr daddr = (req->paddr & addr_mask);
+    Addr daddr = (req->paddr - (addr & PA_IMPL_MASK));
 
     int device = (daddr >> 11) & 0x1F;
     int func = (daddr >> 8) & 0x7;
@@ -75,16 +98,16 @@ PCIConfigAll::read(MemReqPtr &req, uint8_t *data)
         }
     }
 
-    DPRINTFN("Tsunami PCI Configspace  ERROR: read  daddr=%#x size=%d\n", daddr, req->size);
+    DPRINTFN("PCI Configspace  ERROR: read  daddr=%#x size=%d\n",
+             daddr, req->size);
 
     return No_Fault;
 }
 
 Fault
-PCIConfigAll::write(MemReqPtr &req, const uint8_t *data)
+PciConfigAll::write(MemReqPtr &req, const uint8_t *data)
 {
-
-    Addr daddr = (req->paddr & addr_mask);
+    Addr daddr = (req->paddr - (addr & PA_IMPL_MASK));
 
     int device = (daddr >> 11) & 0x1F;
     int func = (daddr >> 8) & 0x7;
@@ -96,7 +119,6 @@ PCIConfigAll::write(MemReqPtr &req, const uint8_t *data)
         uint32_t word_value;
     };
 
-
     if (devices[device][func] == NULL)
         panic("Attempting to write to config space on non-existant device\n");
     else {
@@ -114,48 +136,50 @@ PCIConfigAll::write(MemReqPtr &req, const uint8_t *data)
                 panic("invalid access size(?) for PCI configspace!\n");
             }
     }
-    DPRINTF(PCIConfigAll, "write - va=%#x size=%d data=%#x\n",
+
+    DPRINTF(PciConfigAll, "write - va=%#x size=%d data=%#x\n",
             req->vaddr, req->size, word_value);
-    devices[device][func]->WriteConfig(reg, req->size, word_value);
 
+    devices[device][func]->WriteConfig(reg, req->size, word_value);
 
     return No_Fault;
 }
 
-
 void
-PCIConfigAll::serialize(std::ostream &os)
+PciConfigAll::serialize(std::ostream &os)
 {
     // code should be written
 }
 
 void
-PCIConfigAll::unserialize(Checkpoint *cp, const std::string &section)
+PciConfigAll::unserialize(Checkpoint *cp, const std::string &section)
 {
     //code should be written
 }
 
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(PCIConfigAll)
+#ifndef DOXYGEN_SHOULD_SKIP_THIS
+
+BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
 
-    SimObjectParam<Tsunami *> tsunami;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
     Param<Addr> mask;
 
-END_DECLARE_SIM_OBJECT_PARAMS(PCIConfigAll)
+END_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
 
-BEGIN_INIT_SIM_OBJECT_PARAMS(PCIConfigAll)
+BEGIN_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
 
-    INIT_PARAM(tsunami, "Tsunami"),
     INIT_PARAM(mmu, "Memory Controller"),
     INIT_PARAM(addr, "Device Address"),
     INIT_PARAM(mask, "Address Mask")
 
-END_INIT_SIM_OBJECT_PARAMS(PCIConfigAll)
+END_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
 
-CREATE_SIM_OBJECT(PCIConfigAll)
+CREATE_SIM_OBJECT(PciConfigAll)
 {
-    return new PCIConfigAll(getInstanceName(), tsunami, addr, mask, mmu);
+    return new PciConfigAll(getInstanceName(), addr, mmu);
 }
 
-REGISTER_SIM_OBJECT("PCIConfigAll", PCIConfigAll)
+REGISTER_SIM_OBJECT("PciConfigAll", PciConfigAll)
+
+#endif // DOXYGEN_SHOULD_SKIP_THIS