Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5

[gem5.git] / dev / pciconfigall.hh

diff --git a/dev/pciconfigall.hh b/dev/pciconfigall.hh
index 356e62a3cca9d14171f828c1369a041565716bfe..d9e623b7ebf5b6e5ae28e383a5a31050b24cedff 100644 (file)
--- a/dev/pciconfigall.hh
+++ b/dev/pciconfigall.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 The Regents of The University of Michigan
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@ static const uint32_t MAX_PCI_DEV = 32;
 static const uint32_t MAX_PCI_FUNC = 8;
 
 class PciDev;
+class MemoryController;
 
 /**
  * PCI Config Space
@@ -73,7 +74,7 @@ class PciConfigAll : public PioDevice
      * @param bus The bus that this device is attached to
      */
     PciConfigAll(const std::string &name, Addr a, MemoryController *mmu,
-                 HierParams *hier, Bus *bus);
+                 HierParams *hier, Bus *bus, Tick pio_latency);
 
 
     /**
@@ -115,6 +116,12 @@ class PciConfigAll : public PioDevice
 
     virtual Fault write(MemReqPtr &req, const uint8_t *data);
 
+    /**
+     * Start up function to check if more than one person is using an interrupt line
+     * and print a warning if such a case exists
+     */
+    virtual void startup();
+
     /**
      * Serialize this object to the given output stream.
      * @param os The stream to serialize to.
@@ -134,6 +141,7 @@ class PciConfigAll : public PioDevice
      * @return Tick when the request is done
      */
     Tick cacheAccess(MemReqPtr &req);
+
 };
 
 #endif // __PCICONFIGALL_HH__