/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#include <vector>
#include "cpu/intr_control.hh"
-#include "dev/console.hh"
+#include "dev/simconsole.hh"
#include "dev/etherdev.hh"
#include "dev/ide_ctrl.hh"
#include "dev/tlaser_clock.hh"
intr_sum_type[i] = 0;
}
+Tick
+Tsunami::intrFrequency()
+{
+ return io->frequency();
+}
+
void
Tsunami::postConsoleInt()
{
io->clearPIC(0x10);
}
+void
+Tsunami::postPciInt(int line)
+{
+ cchip->postDRIR(line);
+}
+
+void
+Tsunami::clearPciInt(int line)
+{
+ cchip->clearDRIR(line);
+}
+
+Addr
+Tsunami::pciToDma(Addr pciAddr) const
+{
+ return pchip->translatePciToDma(pciAddr);
+}
+
void
Tsunami::serialize(std::ostream &os)
{