/*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
/** Pointer to the system */
System *system;
+
/** Pointer to the TsunamiIO device which has the RTC */
TsunamiIO *io;
- /** Pointer to the disk controller device */
- IdeController *disk_controller;
- /** Pointer to the ethernet controller device */
- NSGigE *ethernet;
/** Pointer to the Tsunami CChip.
* The chip contains some configuration information and
Tsunami(const std::string &name, System *s, IntrControl *intctrl,
PciConfigAll *pci, int intrFreq);
+ /**
+ * Return the interrupting frequency to AlphaAccess
+ * @return frequency of RTC interrupts
+ */
+ virtual Tick intrFrequency();
+
/**
* Cause the cpu to post a serial interrupt to the CPU.
*/
virtual void clearConsoleInt();
/**
+ * Cause the chipset to post a cpi interrupt to the CPU.
+ */
+ virtual void postPciInt(int line);
+
+ /**
+ * Clear a posted PCI->CPU interrupt
+ */
+ virtual void clearPciInt(int line);
+
+ /**
* Serialize this object to the given output stream.
* @param os The stream to serialize to.
*/