<code>GALLIUM_HUD_TOGGLE_SIGNAL</code> to <code>10</code>
(<code>SIGUSR1</code>).
Use <code>kill -10 <pid></code> to toggle the hud as desired.</dd>
+<dt><code>GALLIUM_HUD_SCALE</code></dt>
+<dd>Scale hud by an integer factor, for high DPI displays. Default is 1.</dd>
<dt><code>GALLIUM_HUD_DUMP_DIR</code></dt>
<dd>specifies a directory for writing the displayed hud values into files.</dd>
<dt><code>GALLIUM_DRIVER</code></dt>
options.</dd>
</dl>
-<h3>Clover state tracker environment variables</h3>
+<h3>Clover environment variables</h3>
<dl>
<dt><code>CLOVER_EXTRA_BUILD_OPTIONS</code></dt>
<code>wglSwapIntervalEXT()</code> will have no effect.</dd>
</dl>
-<h3>VA-API state tracker environment variables</h3>
+<h3>VA-API environment variables</h3>
<dl>
<dt><code>VAAPI_MPEG4_ENABLED</code></dt>
<dd>enable MPEG4 for VA-API, disabled by default.</dd>
<dd>disable memory shaders cache</dd>
<dt><code>nongg</code></dt>
<dd>disable NGG for GFX10+</dd>
- <dt><code>noop</code></dt>
- <dd>do not submit any IBs</dd>
<dt><code>nooutoforder</code></dt>
<dd>disable out-of-order rasterization</dd>
<dt><code>noshaderballot</code></dt>
<dd>disable shader ballot</dd>
- <dt><code>nosisched</code></dt>
- <dd>disable LLVM sisched experimental scheduler</dd>
<dt><code>nothreadllvm</code></dt>
<dd>disable LLVM threaded compilation</dd>
<dt><code>preoptir</code></dt>
</dl>
</dd>
<dt><code>RADV_FORCE_FAMILY</code></dt>
-<dd>force the driver to use a specific family eg. gfx900 (developers only)</dd>
+<dd>create a null device to compile shaders without a AMD GPU (eg. gfx900)</dd>
<dt><code>RADV_PERFTEST</code></dt>
<dd>a comma-separated list of named flags, which do various things:
<dl>
<dd>enable wave32 for vertex/tess/geometry shaders (GFX10+)</dd>
<dt><code>localbos</code></dt>
<dd>enable local BOs</dd>
- <dt><code>nobatchchain</code></dt>
- <dd>disable chained submissions</dd>
<dt><code>pswave32</code></dt>
<dd>enable wave32 for pixel shaders (GFX10+)</dd>
<dt><code>shader_ballot</code></dt>
<dd>enable shader ballot</dd>
- <dt><code>sisched</code></dt>
- <dd>enable LLVM sisched experimental scheduler</dd>
<dt><code>tccompatcmask</code></dt>
<dd>enable TC-compat cmask for MSAA images</dd>
</dl>
</dd>
<dt><code>RADV_SECURE_COMPILE_THREADS</code></dt>
<dd>maximum number of secure compile threads (up to 32)</dd>
+<dt><code>RADV_TEX_ANISO</code></dt>
+<dd>force anisotropy filter (up to 16)</dd>
<dt><code>RADV_TRACE_FILE</code></dt>
<dd>generate cmdbuffer tracefiles when a GPU hang is detected</dd>
+<dt><code>ACO_DEBUG</code></dt>
+<dd>a comma-separated list of named flags, which do various things:
+<dl>
+ <dt><code>validateir</code></dt>
+ <dd>validate the ACO IR at various points of compilation (enabled by default for debug/debugoptimized builds)</dd>
+ <dt><code>validatera</code></dt>
+ <dd>validate register assignment of ACO IR and catches many RA bugs</dd>
+ <dt><code>perfwarn</code></dt>
+ <dd>abort on some suboptimal code generation</dd>
+</dl>
+</dd>
</dl>
<h3>radeonsi driver environment variables</h3>
<dt><code>preoptir</code></dt>
<dd>Print the LLVM IR before initial optimizations</dd>
<h4>Shader compilation tuning flags:</h4>
- <dt><code>sisched</code></dt>
- <dd>Enable LLVM SI Machine Instruction Scheduler.</dd>
<dt><code>gisel</code></dt>
<dd>Enable LLVM global instruction selector.</dd>
<dt><code>w32ge</code></dt>