# Eli Bendersky (eliben@gmail.com)
# This code is in the public domain
#-------------------------------------------------------------------------------
+from ..common.utils import merge_dicts
from ..construct import Pass
ELFOSABI_OPENVMS=13,
ELFOSABI_NSK=14,
ELFOSABI_AROS=15,
+ ELFOSABI_FENIXOS=16,
+ ELFOSABI_CLOUD=17,
+ ELFOSABI_SORTIX=53,
ELFOSABI_ARM_AEABI=64,
ELFOSABI_ARM=97,
+ ELFOSABI_CELL_LV2=102,
ELFOSABI_STANDALONE=255,
_default_=Pass,
)
# e_machine in the ELF header
ENUM_E_MACHINE = dict(
- EM_NONE=0,
- EM_M32=1,
- EM_SPARC=2,
- EM_386=3,
- EM_68K=4,
- EM_88K=5,
- EM_860=7,
- EM_MIPS=8,
- EM_S370=9,
- EM_MIPS_RS3_LE=10,
- EM_PARISC=15,
- EM_VPP500=17,
- EM_SPARC32PLUS=18,
- EM_960=19,
- EM_PPC=20,
- EM_PPC64=21,
- EM_S390=22,
- EM_V800=36,
- EM_FR20=37,
- EM_RH32=38,
- EM_RCE=39,
- EM_ARM=40,
- EM_ALPHA=41,
- EM_SH=42,
- EM_SPARCV9=43,
- EM_TRICORE=44,
- EM_ARC=45,
- EM_H8_300=46,
- EM_H8_300H=47,
- EM_H8S=48,
- EM_H8_500=49,
- EM_IA_64=50,
- EM_MIPS_X=51,
- EM_COLDFIRE=52,
- EM_68HC12=53,
- EM_MMA=54,
- EM_PCP=55,
- EM_NCPU=56,
- EM_NDR1=57,
- EM_STARCORE=58,
- EM_ME16=59,
- EM_ST100=60,
- EM_TINYJ=61,
- EM_X86_64=62,
- EM_PDSP=63,
- EM_PDP10=64,
- EM_PDP11=65,
- EM_FX66=66,
- EM_ST9PLUS=67,
- EM_ST7=68,
- EM_68HC16=69,
- EM_68HC11=70,
- EM_68HC08=71,
- EM_68HC05=72,
- EM_SVX=73,
- EM_ST19=74,
- EM_VAX=75,
- EM_CRIS=76,
- EM_JAVELIN=77,
- EM_FIREPATH=78,
- EM_ZSP=79,
- EM_MMIX=80,
- EM_HUANY=81,
- EM_PRISM=82,
- EM_AVR=83,
- EM_FR30=84,
- EM_D10V=85,
- EM_D30V=86,
- EM_V850=87,
- EM_M32R=88,
- EM_MN10300=89,
- EM_MN10200=90,
- EM_PJ=91,
- EM_OPENRISC=92,
- EM_ARC_A5=93,
- EM_XTENSA=94,
- EM_VIDEOCORE=95,
- EM_TMM_GPP=96,
- EM_NS32K=97,
- EM_TPC=98,
- EM_SNP1K=99,
- EM_ST200=100,
- EM_IP2K=101,
- EM_MAX=102,
- EM_CR=103,
- EM_F2MC16=104,
- EM_MSP430=105,
- EM_BLACKFIN=106,
- EM_SE_C33=107,
- EM_SEP=108,
- EM_ARCA=109,
- EM_UNICORE=110,
- EM_L10M=180,
- EM_AARCH64=183,
+ EM_NONE = 0, # No machine
+ EM_M32 = 1, # AT&T WE 32100
+ EM_SPARC = 2, # SPARC
+ EM_386 = 3, # Intel 80386
+ EM_68K = 4, # Motorola 68000
+ EM_88K = 5, # Motorola 88000
+ EM_IAMCU = 6, # Intel MCU
+ EM_860 = 7, # Intel 80860
+ EM_MIPS = 8, # MIPS I Architecture
+ EM_S370 = 9, # IBM System/370 Processor
+ EM_MIPS_RS3_LE = 10, # MIPS RS3000 Little-endian
+ EM_PARISC = 15, # Hewlett-Packard PA-RISC
+ EM_VPP500 = 17, # Fujitsu VPP500
+ EM_SPARC32PLUS = 18, # Enhanced instruction set SPARC
+ EM_960 = 19, # Intel 80960
+ EM_PPC = 20, # PowerPC
+ EM_PPC64 = 21, # 64-bit PowerPC
+ EM_S390 = 22, # IBM System/390 Processor
+ EM_SPU = 23, # IBM SPU/SPC
+ EM_V800 = 36, # NEC V800
+ EM_FR20 = 37, # Fujitsu FR20
+ EM_RH32 = 38, # TRW RH-32
+ EM_RCE = 39, # Motorola RCE
+ EM_ARM = 40, # ARM 32-bit architecture (AARCH32)
+ EM_ALPHA = 41, # Digital Alpha
+ EM_SH = 42, # Hitachi SH
+ EM_SPARCV9 = 43, # SPARC Version 9
+ EM_TRICORE = 44, # Siemens TriCore embedded processor
+ EM_ARC = 45, # Argonaut RISC Core, Argonaut Technologies Inc.
+ EM_H8_300 = 46, # Hitachi H8/300
+ EM_H8_300H = 47, # Hitachi H8/300H
+ EM_H8S = 48, # Hitachi H8S
+ EM_H8_500 = 49, # Hitachi H8/500
+ EM_IA_64 = 50, # Intel IA-64 processor architecture
+ EM_MIPS_X = 51, # Stanford MIPS-X
+ EM_COLDFIRE = 52, # Motorola ColdFire
+ EM_68HC12 = 53, # Motorola M68HC12
+ EM_MMA = 54, # Fujitsu MMA Multimedia Accelerator
+ EM_PCP = 55, # Siemens PCP
+ EM_NCPU = 56, # Sony nCPU embedded RISC processor
+ EM_NDR1 = 57, # Denso NDR1 microprocessor
+ EM_STARCORE = 58, # Motorola Star*Core processor
+ EM_ME16 = 59, # Toyota ME16 processor
+ EM_ST100 = 60, # STMicroelectronics ST100 processor
+ EM_TINYJ = 61, # Advanced Logic Corp. TinyJ embedded processor family
+ EM_X86_64 = 62, # AMD x86-64 architecture
+ EM_PDSP = 63, # Sony DSP Processor
+ EM_PDP10 = 64, # Digital Equipment Corp. PDP-10
+ EM_PDP11 = 65, # Digital Equipment Corp. PDP-11
+ EM_FX66 = 66, # Siemens FX66 microcontroller
+ EM_ST9PLUS = 67, # STMicroelectronics ST9+ 8/16 bit microcontroller
+ EM_ST7 = 68, # STMicroelectronics ST7 8-bit microcontroller
+ EM_68HC16 = 69, # Motorola MC68HC16 Microcontroller
+ EM_68HC11 = 70, # Motorola MC68HC11 Microcontroller
+ EM_68HC08 = 71, # Motorola MC68HC08 Microcontroller
+ EM_68HC05 = 72, # Motorola MC68HC05 Microcontroller
+ EM_SVX = 73, # Silicon Graphics SVx
+ EM_ST19 = 74, # STMicroelectronics ST19 8-bit microcontroller
+ EM_VAX = 75, # Digital VAX
+ EM_CRIS = 76, # Axis Communications 32-bit embedded processor
+ EM_JAVELIN = 77, # Infineon Technologies 32-bit embedded processor
+ EM_FIREPATH = 78, # Element 14 64-bit DSP Processor
+ EM_ZSP = 79, # LSI Logic 16-bit DSP Processor
+ EM_MMIX = 80, # Donald Knuth's educational 64-bit processor
+ EM_HUANY = 81, # Harvard University machine-independent object files
+ EM_PRISM = 82, # SiTera Prism
+ EM_AVR = 83, # Atmel AVR 8-bit microcontroller
+ EM_FR30 = 84, # Fujitsu FR30
+ EM_D10V = 85, # Mitsubishi D10V
+ EM_D30V = 86, # Mitsubishi D30V
+ EM_V850 = 87, # NEC v850
+ EM_M32R = 88, # Mitsubishi M32R
+ EM_MN10300 = 89, # Matsushita MN10300
+ EM_MN10200 = 90, # Matsushita MN10200
+ EM_PJ = 91, # picoJava
+ EM_OPENRISC = 92, # OpenRISC 32-bit embedded processor
+ EM_ARC_COMPACT = 93, # ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
+ EM_XTENSA = 94, # Tensilica Xtensa Architecture
+ EM_VIDEOCORE = 95, # Alphamosaic VideoCore processor
+ EM_TMM_GPP = 96, # Thompson Multimedia General Purpose Processor
+ EM_NS32K = 97, # National Semiconductor 32000 series
+ EM_TPC = 98, # Tenor Network TPC processor
+ EM_SNP1K = 99, # Trebia SNP 1000 processor
+ EM_ST200 = 100, # STMicroelectronics (www.st.com) ST200 microcontroller
+ EM_IP2K = 101, # Ubicom IP2xxx microcontroller family
+ EM_MAX = 102, # MAX Processor
+ EM_CR = 103, # National Semiconductor CompactRISC microprocessor
+ EM_F2MC16 = 104, # Fujitsu F2MC16
+ EM_MSP430 = 105, # Texas Instruments embedded microcontroller msp430
+ EM_BLACKFIN = 106, # Analog Devices Blackfin (DSP) processor
+ EM_SE_C33 = 107, # S1C33 Family of Seiko Epson processors
+ EM_SEP = 108, # Sharp embedded microprocessor
+ EM_ARCA = 109, # Arca RISC Microprocessor
+ EM_UNICORE = 110, # Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
+ EM_EXCESS = 111, # eXcess: 16/32/64-bit configurable embedded CPU
+ EM_DXP = 112, # Icera Semiconductor Inc. Deep Execution Processor
+ EM_ALTERA_NIOS2 = 113, # Altera Nios II soft-core processor
+ EM_CRX = 114, # National Semiconductor CompactRISC CRX microprocessor
+ EM_XGATE = 115, # Motorola XGATE embedded processor
+ EM_C166 = 116, # Infineon C16x/XC16x processor
+ EM_M16C = 117, # Renesas M16C series microprocessors
+ EM_DSPIC30F = 118, # Microchip Technology dsPIC30F Digital Signal Controller
+ EM_CE = 119, # Freescale Communication Engine RISC core
+ EM_M32C = 120, # Renesas M32C series microprocessors
+ EM_TSK3000 = 131, # Altium TSK3000 core
+ EM_RS08 = 132, # Freescale RS08 embedded processor
+ EM_SHARC = 133, # Analog Devices SHARC family of 32-bit DSP processors
+ EM_ECOG2 = 134, # Cyan Technology eCOG2 microprocessor
+ EM_SCORE7 = 135, # Sunplus S+core7 RISC processor
+ EM_DSP24 = 136, # New Japan Radio (NJR) 24-bit DSP Processor
+ EM_VIDEOCORE3 = 137, # Broadcom VideoCore III processor
+ EM_LATTICEMICO32 = 138, # RISC processor for Lattice FPGA architecture
+ EM_SE_C17 = 139, # Seiko Epson C17 family
+ EM_TI_C6000 = 140, # The Texas Instruments TMS320C6000 DSP family
+ EM_TI_C2000 = 141, # The Texas Instruments TMS320C2000 DSP family
+ EM_TI_C5500 = 142, # The Texas Instruments TMS320C55x DSP family
+ EM_TI_ARP32 = 143, # Texas Instruments Application Specific RISC Processor, 32bit fetch
+ EM_TI_PRU = 144, # Texas Instruments Programmable Realtime Unit
+ EM_MMDSP_PLUS = 160, # STMicroelectronics 64bit VLIW Data Signal Processor
+ EM_CYPRESS_M8C = 161, # Cypress M8C microprocessor
+ EM_R32C = 162, # Renesas R32C series microprocessors
+ EM_TRIMEDIA = 163, # NXP Semiconductors TriMedia architecture family
+ EM_QDSP6 = 164, # QUALCOMM DSP6 Processor
+ EM_8051 = 165, # Intel 8051 and variants
+ EM_STXP7X = 166, # STMicroelectronics STxP7x family of configurable and extensible RISC processors
+ EM_NDS32 = 167, # Andes Technology compact code size embedded RISC processor family
+ EM_ECOG1 = 168, # Cyan Technology eCOG1X family
+ EM_ECOG1X = 168, # Cyan Technology eCOG1X family
+ EM_MAXQ30 = 169, # Dallas Semiconductor MAXQ30 Core Micro-controllers
+ EM_XIMO16 = 170, # New Japan Radio (NJR) 16-bit DSP Processor
+ EM_MANIK = 171, # M2000 Reconfigurable RISC Microprocessor
+ EM_CRAYNV2 = 172, # Cray Inc. NV2 vector architecture
+ EM_RX = 173, # Renesas RX family
+ EM_METAG = 174, # Imagination Technologies META processor architecture
+ EM_MCST_ELBRUS = 175, # MCST Elbrus general purpose hardware architecture
+ EM_ECOG16 = 176, # Cyan Technology eCOG16 family
+ EM_CR16 = 177, # National Semiconductor CompactRISC CR16 16-bit microprocessor
+ EM_ETPU = 178, # Freescale Extended Time Processing Unit
+ EM_SLE9X = 179, # Infineon Technologies SLE9X core
+ EM_L10M = 180, # Intel L10M
+ EM_K10M = 181, # Intel K10M
+ EM_AARCH64 = 183, # ARM 64-bit architecture (AARCH64)
+ EM_AVR32 = 185, # Atmel Corporation 32-bit microprocessor family
+ EM_STM8 = 186, # STMicroeletronics STM8 8-bit microcontroller
+ EM_TILE64 = 187, # Tilera TILE64 multicore architecture family
+ EM_TILEPRO = 188, # Tilera TILEPro multicore architecture family
+ EM_MICROBLAZE = 189, # Xilinx MicroBlaze 32-bit RISC soft processor core
+ EM_CUDA = 190, # NVIDIA CUDA architecture
+ EM_TILEGX = 191, # Tilera TILE-Gx multicore architecture family
+ EM_CLOUDSHIELD = 192, # CloudShield architecture family
+ EM_COREA_1ST = 193, # KIPO-KAIST Core-A 1st generation processor family
+ EM_COREA_2ND = 194, # KIPO-KAIST Core-A 2nd generation processor family
+ EM_ARC_COMPACT2 = 195, # Synopsys ARCompact V2
+ EM_OPEN8 = 196, # Open8 8-bit RISC soft processor core
+ EM_RL78 = 197, # Renesas RL78 family
+ EM_VIDEOCORE5 = 198, # Broadcom VideoCore V processor
+ EM_78KOR = 199, # Renesas 78KOR family
+ EM_56800EX = 200, # Freescale 56800EX Digital Signal Controller (DSC)
+ EM_BA1 = 201, # Beyond BA1 CPU architecture
+ EM_BA2 = 202, # Beyond BA2 CPU architecture
+ EM_XCORE = 203, # XMOS xCORE processor family
+ EM_MCHP_PIC = 204, # Microchip 8-bit PIC(r) family
+ EM_INTEL205 = 205, # Reserved by Intel
+ EM_INTEL206 = 206, # Reserved by Intel
+ EM_INTEL207 = 207, # Reserved by Intel
+ EM_INTEL208 = 208, # Reserved by Intel
+ EM_INTEL209 = 209, # Reserved by Intel
+ EM_KM32 = 210, # KM211 KM32 32-bit processor
+ EM_KMX32 = 211, # KM211 KMX32 32-bit processor
+ EM_KMX16 = 212, # KM211 KMX16 16-bit processor
+ EM_KMX8 = 213, # KM211 KMX8 8-bit processor
+ EM_KVARC = 214, # KM211 KVARC processor
+ EM_CDP = 215, # Paneve CDP architecture family
+ EM_COGE = 216, # Cognitive Smart Memory Processor
+ EM_COOL = 217, # Bluechip Systems CoolEngine
+ EM_NORC = 218, # Nanoradio Optimized RISC
+ EM_CSR_KALIMBA = 219, # CSR Kalimba architecture family
+ EM_Z80 = 220, # Zilog Z80
+ EM_VISIUM = 221, # Controls and Data Services VISIUMcore processor
+ EM_FT32 = 222, # FTDI Chip FT32 high performance 32-bit RISC architecture
+ EM_MOXIE = 223, # Moxie processor family
+ EM_AMDGPU = 224, # AMD GPU architecture
+ EM_RISCV = 243, # RISC-V
+ EM_BPF = 247, # Linux BPF - in-kernel virtual machine
+ EM_CSKY = 252, # C-SKY
+ EM_FRV = 0x5441, # Fujitsu FR-V
+ # Reservations
+ # reserved 11-14 Reserved for future use
+ # reserved 16 Reserved for future use
+ # reserved 24-35 Reserved for future use
+ # reserved 121-130 Reserved for future use
+ # reserved 145-159 Reserved for future use
+ # reserved 145-159 Reserved for future use
+ # reserved 182 Reserved for future Intel use
+ # reserved 184 Reserved for future ARM use
+ # unknown/reserve? 225 - 242
_default_=Pass,
)
# sh_type in the section header
-ENUM_SH_TYPE = dict(
+#
+# This is the "base" dict that doesn't hold processor-specific values; from it
+# we later create per-processor dicts that use the LOPROC...HIPROC range to
+# define processor-specific values. The proper dict should be used based on the
+# machine the ELF header refers to.
+ENUM_SH_TYPE_BASE = dict(
SHT_NULL=0,
SHT_PROGBITS=1,
SHT_SYMTAB=2,
SHT_PREINIT_ARRAY=16,
SHT_GROUP=17,
SHT_SYMTAB_SHNDX=18,
- SHT_NUM=19,
+ SHT_RELR=19,
+ SHT_NUM=20,
SHT_LOOS=0x60000000,
+ SHT_GNU_ATTRIBUTES=0x6ffffff5,
SHT_GNU_HASH=0x6ffffff6,
SHT_GNU_LIBLIST=0x6ffffff7,
SHT_GNU_verdef=0x6ffffffd, # also SHT_SUNW_verdef
SHT_GNU_verneed=0x6ffffffe, # also SHT_SUNW_verneed
SHT_GNU_versym=0x6fffffff, # also SHT_SUNW_versym, SHT_HIOS
- SHT_LOPROC=0x70000000,
- SHT_HIPROC=0x7fffffff,
+
+ # These are commented out because they carry no semantic meaning in
+ # themselves and may be overridden by target-specific enums.
+ #SHT_LOPROC=0x70000000,
+ #SHT_HIPROC=0x7fffffff,
+
SHT_LOUSER=0x80000000,
SHT_HIUSER=0xffffffff,
- SHT_AMD64_UNWIND=0x70000001,
SHT_SUNW_LDYNSYM=0x6ffffff3,
SHT_SUNW_syminfo=0x6ffffffc,
- SHT_ARM_EXIDX=0x70000001, # also SHT_MIPS_MSYM
- SHT_ARM_PREEMPTMAP=0x70000002, # also SHT_MIPS_CONFLICT
- SHT_ARM_ATTRIBUTES=0x70000003, # also SHT_MIPS_GPTAB
- SHT_ARM_DEBUGOVERLAY=0x70000004, # also SHT_MIPS_UCODE
- SHT_MIPS_LIBLIST=0x70000000,
- SHT_MIPS_DEBUG=0x70000005,
- SHT_MIPS_REGINFO=0x70000006,
- SHT_MIPS_PACKAGE=0x70000007,
- SHT_MIPS_PACKSYM=0x70000008,
- SHT_MIPS_RELD=0x70000009,
- SHT_MIPS_IFACE=0x7000000b,
- SHT_MIPS_CONTENT=0x7000000c,
- SHT_MIPS_OPTIONS=0x7000000d,
- SHT_MIPS_SHDR=0x70000010,
- SHT_MIPS_FDESC=0x70000011,
- SHT_MIPS_EXTSYM=0x70000012,
- SHT_MIPS_DENSE=0x70000013,
- SHT_MIPS_PDESC=0x70000014,
- SHT_MIPS_LOCSYM=0x70000015,
- SHT_MIPS_AUXSYM=0x70000016,
- SHT_MIPS_OPTSYM=0x70000017,
- SHT_MIPS_LOCSTR=0x70000018,
- SHT_MIPS_LINE=0x70000019,
- SHT_MIPS_RFDESC=0x7000001a,
- SHT_MIPS_DELTASYM=0x7000001b,
- SHT_MIPS_DELTAINST=0x7000001c,
- SHT_MIPS_DELTACLASS=0x7000001d,
- SHT_MIPS_DWARF=0x7000001e,
- SHT_MIPS_DELTADECL=0x7000001f,
- SHT_MIPS_SYMBOL_LIB=0x70000020,
- SHT_MIPS_EVENTS=0x70000021,
- SHT_MIPS_TRANSLATE=0x70000022,
- SHT_MIPS_PIXIE=0x70000023,
- SHT_MIPS_XLATE=0x70000024,
- SHT_MIPS_XLATE_DEBUG=0x70000025,
- SHT_MIPS_WHIRL=0x70000026,
- SHT_MIPS_EH_REGION=0x70000027,
- SHT_MIPS_XLATE_OLD=0x70000028,
- SHT_MIPS_PDR_EXCEPTION=0x70000029,
+ _default_=Pass,
+)
+
+ENUM_SH_TYPE_AMD64 = merge_dicts(
+ ENUM_SH_TYPE_BASE,
+ dict(SHT_AMD64_UNWIND=0x70000001))
+
+ENUM_SH_TYPE_ARM = merge_dicts(
+ ENUM_SH_TYPE_BASE,
+ dict(
+ SHT_ARM_EXIDX=0x70000001,
+ SHT_ARM_PREEMPTMAP=0x70000002,
+ SHT_ARM_ATTRIBUTES=0x70000003,
+ SHT_ARM_DEBUGOVERLAY=0x70000004))
+
+ENUM_SH_TYPE_MIPS = merge_dicts(
+ ENUM_SH_TYPE_BASE,
+ dict(
+ SHT_MIPS_LIBLIST=0x70000000,
+ SHT_MIPS_DEBUG=0x70000005,
+ SHT_MIPS_REGINFO=0x70000006,
+ SHT_MIPS_PACKAGE=0x70000007,
+ SHT_MIPS_PACKSYM=0x70000008,
+ SHT_MIPS_RELD=0x70000009,
+ SHT_MIPS_IFACE=0x7000000b,
+ SHT_MIPS_CONTENT=0x7000000c,
+ SHT_MIPS_OPTIONS=0x7000000d,
+ SHT_MIPS_SHDR=0x70000010,
+ SHT_MIPS_FDESC=0x70000011,
+ SHT_MIPS_EXTSYM=0x70000012,
+ SHT_MIPS_DENSE=0x70000013,
+ SHT_MIPS_PDESC=0x70000014,
+ SHT_MIPS_LOCSYM=0x70000015,
+ SHT_MIPS_AUXSYM=0x70000016,
+ SHT_MIPS_OPTSYM=0x70000017,
+ SHT_MIPS_LOCSTR=0x70000018,
+ SHT_MIPS_LINE=0x70000019,
+ SHT_MIPS_RFDESC=0x7000001a,
+ SHT_MIPS_DELTASYM=0x7000001b,
+ SHT_MIPS_DELTAINST=0x7000001c,
+ SHT_MIPS_DELTACLASS=0x7000001d,
+ SHT_MIPS_DWARF=0x7000001e,
+ SHT_MIPS_DELTADECL=0x7000001f,
+ SHT_MIPS_SYMBOL_LIB=0x70000020,
+ SHT_MIPS_EVENTS=0x70000021,
+ SHT_MIPS_TRANSLATE=0x70000022,
+ SHT_MIPS_PIXIE=0x70000023,
+ SHT_MIPS_XLATE=0x70000024,
+ SHT_MIPS_XLATE_DEBUG=0x70000025,
+ SHT_MIPS_WHIRL=0x70000026,
+ SHT_MIPS_EH_REGION=0x70000027,
+ SHT_MIPS_XLATE_OLD=0x70000028,
+ SHT_MIPS_PDR_EXCEPTION=0x70000029,
+ SHT_MIPS_ABIFLAGS=0x7000002a))
+
+ENUM_ELFCOMPRESS_TYPE = dict(
+ ELFCOMPRESS_ZLIB=1,
+ ELFCOMPRESS_LOOS=0x60000000,
+ ELFCOMPRESS_HIOS=0x6fffffff,
+ ELFCOMPRESS_LOPROC=0x70000000,
+ ELFCOMPRESS_HIPROC=0x7fffffff,
_default_=Pass,
)
# p_type in the program header
# some values scavenged from the ELF headers in binutils-2.21
-ENUM_P_TYPE = dict(
+#
+# Using the same base + per-processor augmentation technique as in sh_type.
+ENUM_P_TYPE_BASE = dict(
PT_NULL=0,
PT_LOAD=1,
PT_DYNAMIC=2,
PT_TLS=7,
PT_LOOS=0x60000000,
PT_HIOS=0x6fffffff,
- PT_LOPROC=0x70000000,
- PT_HIPROC=0x7fffffff,
+
+ # These are commented out because they carry no semantic meaning in
+ # themselves and may be overridden by target-specific enums.
+ #PT_LOPROC=0x70000000,
+ #PT_HIPROC=0x7fffffff,
+
PT_GNU_EH_FRAME=0x6474e550,
PT_GNU_STACK=0x6474e551,
PT_GNU_RELRO=0x6474e552,
- PT_ARM_ARCHEXT=0x70000000,
- PT_ARM_EXIDX=0x70000001,
- PT_AARCH64_ARCHEXT=0x70000000,
- PT_AARCH64_UNWIND=0x70000001,
+ PT_GNU_PROPERTY=0x6474e553,
_default_=Pass,
)
+ENUM_P_TYPE_ARM = merge_dicts(
+ ENUM_P_TYPE_BASE,
+ dict(
+ PT_ARM_ARCHEXT=0x70000000,
+ PT_ARM_EXIDX=0x70000001))
+
+ENUM_P_TYPE_AARCH64 = merge_dicts(
+ ENUM_P_TYPE_BASE,
+ dict(
+ PT_AARCH64_ARCHEXT=0x70000000,
+ PT_AARCH64_UNWIND=0x70000001))
+
+ENUM_P_TYPE_MIPS = merge_dicts(
+ ENUM_P_TYPE_BASE,
+ dict(PT_MIPS_ABIFLAGS=0x70000003))
+
# st_info bindings in the symbol header
ENUM_ST_INFO_BIND = dict(
STB_LOCAL=0,
_default_=Pass,
)
+ENUM_ST_LOCAL = dict(
+ _default_=Pass,
+)
+
# st_shndx
ENUM_ST_SHNDX = dict(
SHN_UNDEF=0,
)
# d_tag
-ENUM_D_TAG = dict(
+ENUM_D_TAG_COMMON = dict(
DT_NULL=0,
DT_NEEDED=1,
DT_PLTRELSZ=2,
DT_ENCODING=32,
DT_PREINIT_ARRAY=32,
DT_PREINIT_ARRAYSZ=33,
- DT_NUM=34,
+ DT_SYMTAB_SHNDX=34,
+ DT_RELRSZ=35,
+ DT_RELR=36,
+ DT_RELRENT=37,
+ DT_NUM=38,
DT_LOOS=0x6000000d,
- DT_SUNW_AUXILIARY=0x6000000d,
- DT_SUNW_RTLDINF=0x6000000e,
- DT_SUNW_FILTER=0x6000000f,
- DT_SUNW_CAP=0x60000010,
- DT_SUNW_SYMTAB=0x60000011,
- DT_SUNW_SYMSZ=0x60000012,
- DT_SUNW_ENCODING=0x60000013,
- DT_SUNW_SORTENT=0x60000013,
- DT_SUNW_SYMSORT=0x60000014,
- DT_SUNW_SYMSORTSZ=0x60000015,
- DT_SUNW_TLSSORT=0x60000016,
- DT_SUNW_TLSSORTSZ=0x60000017,
- DT_SUNW_CAPINFO=0x60000018,
- DT_SUNW_STRPAD=0x60000019,
- DT_SUNW_CAPCHAIN=0x6000001a,
- DT_SUNW_LDMACH=0x6000001b,
- DT_SUNW_CAPCHAINENT=0x6000001d,
- DT_SUNW_CAPCHAINSZ=0x6000001f,
+ DT_ANDROID_REL=0x6000000f,
+ DT_ANDROID_RELSZ=0x60000010,
+ DT_ANDROID_RELA=0x60000011,
+ DT_ANDROID_RELASZ=0x60000012,
+ DT_ANDROID_RELR=0x6fffe000,
+ DT_ANDROID_RELRSZ=0x6fffe001,
+ DT_ANDROID_RELRENT=0x6fffe003,
+ DT_ANDROID_RELRCOUNT=0x6fffe005,
DT_HIOS=0x6ffff000,
DT_LOPROC=0x70000000,
DT_HIPROC=0x7fffffff,
DT_VERDEFNUM=0x6ffffffd,
DT_VERNEED=0x6ffffffe,
DT_VERNEEDNUM=0x6fffffff,
+ DT_AUXILIARY=0x7ffffffd,
+ DT_FILTER=0x7fffffff,
+ _default_=Pass,
+)
+
+# Above are the dynamic tags which are valid always.
+# Below are the dynamic tags which are only valid in certain contexts.
+
+ENUM_D_TAG_SOLARIS = dict(
+ DT_SUNW_AUXILIARY=0x6000000d,
+ DT_SUNW_RTLDINF=0x6000000e,
+ DT_SUNW_FILTER=0x6000000f,
+ DT_SUNW_CAP=0x60000010,
+ DT_SUNW_SYMTAB=0x60000011,
+ DT_SUNW_SYMSZ=0x60000012,
+ DT_SUNW_ENCODING=0x60000013,
+ DT_SUNW_SORTENT=0x60000013,
+ DT_SUNW_SYMSORT=0x60000014,
+ DT_SUNW_SYMSORTSZ=0x60000015,
+ DT_SUNW_TLSSORT=0x60000016,
+ DT_SUNW_TLSSORTSZ=0x60000017,
+ DT_SUNW_CAPINFO=0x60000018,
+ DT_SUNW_STRPAD=0x60000019,
+ DT_SUNW_CAPCHAIN=0x6000001a,
+ DT_SUNW_LDMACH=0x6000001b,
+ DT_SUNW_CAPCHAINENT=0x6000001d,
+ DT_SUNW_CAPCHAINSZ=0x6000001f,
+)
+
+ENUM_D_TAG_MIPS = dict(
DT_MIPS_RLD_VERSION=0x70000001,
DT_MIPS_TIME_STAMP=0x70000002,
DT_MIPS_ICHECKSUM=0x70000003,
DT_MIPS_GOTSYM=0x70000013,
DT_MIPS_HIPAGENO=0x70000014,
DT_MIPS_RLD_MAP=0x70000016,
- DT_AUXILIARY=0x7ffffffd,
- DT_FILTER=0x7fffffff,
- _default_=Pass,
+ DT_MIPS_RLD_MAP_REL=0x70000035,
+)
+
+# Here is the mapping from e_machine enum to the extra dynamic tags which it
+# validates. Solaris is missing from this list because its inclusion is not
+# controlled by e_machine but rather e_ident[EI_OSABI].
+# TODO: add the rest of the machine-specific dynamic tags, not just mips and
+# solaris
+
+ENUMMAP_EXTRA_D_TAG_MACHINE = dict(
+ EM_MIPS=ENUM_D_TAG_MIPS,
+ EM_MIPS_RS3_LE=ENUM_D_TAG_MIPS,
+)
+
+# Here is the full combined mapping from tag name to value
+
+ENUM_D_TAG = dict(ENUM_D_TAG_COMMON)
+ENUM_D_TAG.update(ENUM_D_TAG_SOLARIS)
+for k in ENUMMAP_EXTRA_D_TAG_MACHINE:
+ ENUM_D_TAG.update(ENUMMAP_EXTRA_D_TAG_MACHINE[k])
+
+ENUM_DT_FLAGS = dict(
+ DF_ORIGIN=0x1,
+ DF_SYMBOLIC=0x2,
+ DF_TEXTREL=0x4,
+ DF_BIND_NOW=0x8,
+ DF_STATIC_TLS=0x10,
+)
+
+ENUM_DT_FLAGS_1 = dict(
+ DF_1_NOW=0x1,
+ DF_1_GLOBAL=0x2,
+ DF_1_GROUP=0x4,
+ DF_1_NODELETE=0x8,
+ DF_1_LOADFLTR=0x10,
+ DF_1_INITFIRST=0x20,
+ DF_1_NOOPEN=0x40,
+ DF_1_ORIGIN=0x80,
+ DF_1_DIRECT=0x100,
+ DF_1_TRANS=0x200,
+ DF_1_INTERPOSE=0x400,
+ DF_1_NODEFLIB=0x800,
+ DF_1_NODUMP=0x1000,
+ DF_1_CONFALT=0x2000,
+ DF_1_ENDFILTEE=0x4000,
+ DF_1_DISPRELDNE=0x8000,
+ DF_1_DISPRELPND=0x10000,
+ DF_1_NODIRECT=0x20000,
+ DF_1_IGNMULDEF=0x40000,
+ DF_1_NOKSYMS=0x80000,
+ DF_1_NOHDR=0x100000,
+ DF_1_EDITED=0x200000,
+ DF_1_NORELOC=0x400000,
+ DF_1_SYMINTPOSE=0x800000,
+ DF_1_GLOBAUDIT=0x1000000,
+ DF_1_SINGLETON=0x2000000,
+ DF_1_STUB=0x4000000,
+ DF_1_PIE=0x8000000,
)
ENUM_RELOC_TYPE_MIPS = dict(
R_X86_64_TLSDESC_CALL=35,
R_X86_64_TLSDESC=36,
R_X86_64_IRELATIVE=37,
+ R_X86_64_REX_GOTPCRELX=42,
R_X86_64_GNU_VTINHERIT=250,
R_X86_64_GNU_VTENTRY=251,
_default_=Pass,
VER_NDX_ELIMINATE=0xff01,
_default_=Pass,
)
+
# Sunw Syminfo Bound To special values
ENUM_SUNW_SYMINFO_BOUNDTO = dict(
SYMINFO_BT_SELF=0xffff,
_default_=Pass,
)
-# PT_NOTE section types
+# PT_NOTE section types for all ELF types except ET_CORE
ENUM_NOTE_N_TYPE = dict(
NT_GNU_ABI_TAG=1,
NT_GNU_HWCAP=2,
NT_GNU_BUILD_ID=3,
NT_GNU_GOLD_VERSION=4,
+ NT_GNU_PROPERTY_TYPE_0=5,
+ _default_=Pass,
+)
+
+# PT_NOTE section types for ET_CORE
+ENUM_CORE_NOTE_N_TYPE = dict(
+ NT_PRSTATUS=1,
+ NT_FPREGSET=2,
+ NT_PRPSINFO=3,
+ NT_TASKSTRUCT=4,
+ NT_AUXV=6,
+ NT_SIGINFO=0x53494749,
+ NT_FILE=0x46494c45,
_default_=Pass,
)
_default_=Pass,
)
+# Values in GNU .note.gnu.property notes (n_type=='NT_GNU_PROPERTY_TYPE_0')
+ENUM_NOTE_GNU_PROPERTY_TYPE = dict(
+ GNU_PROPERTY_STACK_SIZE=1,
+ GNU_PROPERTY_NO_COPY_ON_PROTECTED=2,
+ GNU_PROPERTY_X86_FEATURE_1_AND=0xc0000002,
+ GNU_PROPERTY_X86_ISA_1_NEEDED=0xc0008002,
+ _default_=Pass,
+)
+
+ENUM_GNU_PROPERTY_X86_FEATURE_1_FLAGS = dict(
+ GNU_PROPERTY_X86_FEATURE_1_IBT=1,
+ GNU_PROPERTY_X86_FEATURE_1_SHSTK=2,
+ GNU_PROPERTY_X86_FEATURE_1_LAM_U48=4,
+ GNU_PROPERTY_X86_FEATURE_1_LAM_U57=8,
+ _default_=Pass
+)
+
ENUM_RELOC_TYPE_ARM = dict(
R_ARM_NONE=0,
R_ARM_PC24=1,
R_AARCH64_TLS_DTPMOD32=1032,
R_AARCH64_TLS_TPREL32=1033,
)
+
+ENUM_ATTR_TAG_ARM = dict(
+ TAG_FILE=1,
+ TAG_SECTION=2,
+ TAG_SYMBOL=3,
+ TAG_CPU_RAW_NAME=4,
+ TAG_CPU_NAME=5,
+ TAG_CPU_ARCH=6,
+ TAG_CPU_ARCH_PROFILE=7,
+ TAG_ARM_ISA_USE=8,
+ TAG_THUMB_ISA_USE=9,
+ TAG_FP_ARCH=10,
+ TAG_WMMX_ARCH=11,
+ TAG_ADVANCED_SIMD_ARCH=12,
+ TAG_PCS_CONFIG=13,
+ TAG_ABI_PCS_R9_USE=14,
+ TAG_ABI_PCS_RW_DATA=15,
+ TAG_ABI_PCS_RO_DATA=16,
+ TAG_ABI_PCS_GOT_USE=17,
+ TAG_ABI_PCS_WCHAR_T=18,
+ TAG_ABI_FP_ROUNDING=19,
+ TAG_ABI_FP_DENORMAL=20,
+ TAG_ABI_FP_EXCEPTIONS=21,
+ TAG_ABI_FP_USER_EXCEPTIONS=22,
+ TAG_ABI_FP_NUMBER_MODEL=23,
+ TAG_ABI_ALIGN_NEEDED=24,
+ TAG_ABI_ALIGN_PRESERVED=25,
+ TAG_ABI_ENUM_SIZE=26,
+ TAG_ABI_HARDFP_USE=27,
+ TAG_ABI_VFP_ARGS=28,
+ TAG_ABI_WMMX_ARGS=29,
+ TAG_ABI_OPTIMIZATION_GOALS=30,
+ TAG_ABI_FP_OPTIMIZATION_GOALS=31,
+ TAG_COMPATIBILITY=32,
+ TAG_CPU_UNALIGNED_ACCESS=34,
+ TAG_FP_HP_EXTENSION=36,
+ TAG_ABI_FP_16BIT_FORMAT=38,
+ TAG_MPEXTENSION_USE=42,
+ TAG_DIV_USE=44,
+ TAG_NODEFAULTS=64,
+ TAG_ALSO_COMPATIBLE_WITH=65,
+ TAG_T2EE_USE=66,
+ TAG_CONFORMANCE=67,
+ TAG_VIRTUALIZATION_USE=68,
+ TAG_MPEXTENSION_USE_OLD=70,
+)
+
+# https://openpowerfoundation.org/wp-content/uploads/2016/03/ABI64BitOpenPOWERv1.1_16July2015_pub4.pdf
+# See 3.5.3 Relocation Types Table.
+ENUM_RELOC_TYPE_PPC64 = dict(
+ R_PPC64_NONE=0,
+ R_PPC64_ADDR32=1,
+ R_PPC64_ADDR24=2,
+ R_PPC64_ADDR16=3,
+ R_PPC64_ADDR16_LO=4,
+ R_PPC64_ADDR16_HI=5,
+ R_PPC64_ADDR16_HA=6,
+ R_PPC64_ADDR14=7,
+ R_PPC64_ADDR14_BRTAKEN=8,
+ R_PPC64_ADDR14_BRNTAKEN=9,
+ R_PPC64_REL24=10,
+ R_PPC64_REL14=11,
+ R_PPC64_REL14_BRTAKEN=12,
+ R_PPC64_REL14_BRNTAKEN=13,
+ R_PPC64_GOT16=14,
+ R_PPC64_GOT16_LO=15,
+ R_PPC64_GOT16_HI=16,
+ R_PPC64_GOT16_HA=17,
+ R_PPC64_COPY=19,
+ R_PPC64_GLOB_DAT=20,
+ R_PPC64_JMP_SLOT=21,
+ R_PPC64_RELATIVE=22,
+ R_PPC64_UADDR32=24,
+ R_PPC64_UADDR16=25,
+ R_PPC64_REL32=26,
+ R_PPC64_PLT32=27,
+ R_PPC64_PLTREL32=28,
+ R_PPC64_PLT16_LO=29,
+ R_PPC64_PLT16_HI=30,
+ R_PPC64_PLT16_HA=31,
+ R_PPC64_SECTOFF=33,
+ R_PPC64_SECTOFF_LO=34,
+ R_PPC64_SECTOFF_HI=35,
+ R_PPC64_SECTOFF_HA=36,
+ R_PPC64_ADDR30=37,
+ R_PPC64_ADDR64=38,
+ R_PPC64_ADDR16_HIGHER=39,
+ R_PPC64_ADDR16_HIGHERA=40,
+ R_PPC64_ADDR16_HIGHEST=41,
+ R_PPC64_ADDR16_HIGHESTA=42,
+ R_PPC64_UADDR64=43,
+ R_PPC64_REL64=44,
+ R_PPC64_PLT64=45,
+ R_PPC64_PLTREL64=46,
+ R_PPC64_TOC16=47,
+ R_PPC64_TOC16_LO=48,
+ R_PPC64_TOC16_HI=49,
+ R_PPC64_TOC16_HA=50,
+ R_PPC64_TOC=51,
+ R_PPC64_PLTGOT16=52,
+ R_PPC64_PLTGOT16_LO=53,
+ R_PPC64_PLTGOT16_HI=54,
+ R_PPC64_PLTGOT16_HA=55,
+ R_PPC64_ADDR16_DS=56,
+ R_PPC64_ADDR16_LO_DS=57,
+ R_PPC64_GOT16_DS=58,
+ R_PPC64_GOT16_LO_DS=59,
+ R_PPC64_PLT16_LO_DS=60,
+ R_PPC64_SECTOFF_DS=61,
+ R_PPC64_SECTOFF_LO_DS=62,
+ R_PPC64_TOC16_DS=63,
+ R_PPC64_TOC16_LO_DS=64,
+ R_PPC64_PLTGOT16_DS=65,
+ R_PPC64_PLTGOT16_LO_DS=66,
+ R_PPC64_TLS=67,
+ R_PPC64_DTPMOD64=68,
+ R_PPC64_TPREL16=69,
+ R_PPC64_TPREL16_LO=70,
+ R_PPC64_TPREL16_HI=71,
+ R_PPC64_TPREL16_HA=72,
+ R_PPC64_TPREL64=73,
+ R_PPC64_DTPREL16=74,
+ R_PPC64_DTPREL16_LO=75,
+ R_PPC64_DTPREL16_HI=76,
+ R_PPC64_DTPREL16_HA=77,
+ R_PPC64_DTPREL64=78,
+ R_PPC64_GOT_TLSGD16=79,
+ R_PPC64_GOT_TLSGD16_LO=80,
+ R_PPC64_GOT_TLSGD16_HI=81,
+ R_PPC64_GOT_TLSGD16_HA=82,
+ R_PPC64_GOT_TLSLD16=83,
+ R_PPC64_GOT_TLSLD16_LO=84,
+ R_PPC64_GOT_TLSLD16_HI=85,
+ R_PPC64_GOT_TLSLD16_HA=86,
+ R_PPC64_GOT_TPREL16_DS=87,
+ R_PPC64_GOT_TPREL16_LO_DS=88,
+ R_PPC64_GOT_TPREL16_HI=89,
+ R_PPC64_GOT_TPREL16_HA=90,
+ R_PPC64_GOT_DTPREL16_DS=91,
+ R_PPC64_GOT_DTPREL16_LO_DS=92,
+ R_PPC64_GOT_DTPREL16_HI=93,
+ R_PPC64_GOT_DTPREL16_HA=94,
+ R_PPC64_TPREL16_DS=95,
+ R_PPC64_TPREL16_LO_DS=96,
+ R_PPC64_TPREL16_HIGHER=97,
+ R_PPC64_TPREL16_HIGHERA=98,
+ R_PPC64_TPREL16_HIGHEST=99,
+ R_PPC64_TPREL16_HIGHESTA=100,
+ R_PPC64_DTPREL16_DS=101,
+ R_PPC64_DTPREL16_LO_DS=102,
+ R_PPC64_DTPREL16_HIGHER=103,
+ R_PPC64_DTPREL16_HIGHERA=104,
+ R_PPC64_DTPREL16_HIGHEST=105,
+ R_PPC64_DTPREL16_HIGHESTA=106,
+ R_PPC64_TLSGD=107,
+ R_PPC64_TLSLD=108,
+ R_PPC64_TOCSAVE=109,
+ R_PPC64_ADDR16_HIGH=110,
+ R_PPC64_ADDR16_HIGHA=111,
+ R_PPC64_TPREL16_HIGH=112,
+ R_PPC64_TPREL16_HIGHA=113,
+ R_PPC64_DTPREL16_HIGH=114,
+ R_PPC64_DTPREL16_HIGHA=115,
+ R_PPC64_REL24_NOTOC=116,
+ R_PPC64_ADDR64_LOCAL=117,
+ R_PPC64_IRELATIVE=248,
+ R_PPC64_REL16=249,
+ R_PPC64_REL16_LO=250,
+ R_PPC64_REL16_HI=251,
+ R_PPC64_REL16_HA=252,
+ R_PPC64_GNU_VTINHERIT=253,
+ R_PPC64_GNU_VTENTRY=254,
+)
projects / pyelftools.git / blobdiff