Merge remote-tracking branch 'origin/master' into xaig_dff

[yosys.git] / frontends / aiger / aigerparse.cc

diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc
index 6fd9e0432ee34a2497caa235767660fd0998ed94..cb4ec618317a291c30a04a17b008e2aa0e4a0e85 100644 (file)
--- a/frontends/aiger/aigerparse.cc
+++ b/frontends/aiger/aigerparse.cc
@@ -67,7 +67,7 @@ struct ConstEvalAig
                                continue;
                        for (auto &it2 : it.second->connections())
                                if (yosys_celltypes.cell_output(it.second->type, it2.first)) {
-                                       auto r = sig2driver.insert(std::make_pair(it2.second, it.second));
+                                       auto r YS_ATTRIBUTE(unused) = sig2driver.insert(std::make_pair(it2.second, it.second));
                                        log_assert(r.second);
                                }
                }
@@ -389,9 +389,9 @@ void AigerReader::parse_xaiger(const dict<int,IdString> &box_lookup)
                        f.ignore(1);
                        // XAIGER extensions
                        if (c == 'm') {
-                               uint32_t dataSize = parse_xaiger_literal(f);
+                               uint32_t dataSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                uint32_t lutNum = parse_xaiger_literal(f);
-                               uint32_t lutSize = parse_xaiger_literal(f);
+                               uint32_t lutSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                log_debug("m: dataSize=%u lutNum=%u lutSize=%u\n", dataSize, lutNum, lutSize);
                                ConstEvalAig ce(module);
                                for (unsigned i = 0; i < lutNum; ++i) {
@@ -416,7 +416,7 @@ void AigerReader::parse_xaiger(const dict<int,IdString> &box_lookup)
                                                int gray = j ^ (j >> 1);
                                                ce.set_incremental(input_sig, RTLIL::Const{gray, static_cast<int>(cutLeavesM)});
                                                RTLIL::SigBit o(output_sig);
-                                               bool success = ce.eval(o);
+                                               bool success YS_ATTRIBUTE(unused) = ce.eval(o);
                                                log_assert(success);
                                                log_assert(o.wire == nullptr);
                                                lut_mask[gray] = o.data;
@@ -428,7 +428,7 @@ void AigerReader::parse_xaiger(const dict<int,IdString> &box_lookup)
                                }
                        }
                        else if (c == 'r') {
-                               uint32_t dataSize = parse_xaiger_literal(f);
+                               uint32_t dataSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                flopNum = parse_xaiger_literal(f);
                                log_debug("flopNum: %u\n", flopNum);
                                log_assert(dataSize == (flopNum+1) * sizeof(uint32_t));
@@ -441,15 +441,15 @@ void AigerReader::parse_xaiger(const dict<int,IdString> &box_lookup)
                        }
                        else if (c == 'h') {
                                f.ignore(sizeof(uint32_t));
-                               uint32_t version = parse_xaiger_literal(f);
+                               uint32_t version YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                log_assert(version == 1);
-                               uint32_t ciNum = parse_xaiger_literal(f);
+                               uint32_t ciNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                log_debug("ciNum = %u\n", ciNum);
-                               uint32_t coNum = parse_xaiger_literal(f);
+                               uint32_t coNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                log_debug("coNum = %u\n", coNum);
                                piNum = parse_xaiger_literal(f);
                                log_debug("piNum = %u\n", piNum);
-                               uint32_t poNum = parse_xaiger_literal(f);
+                               uint32_t poNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f);
                                log_debug("poNum = %u\n", poNum);
                                uint32_t boxNum = parse_xaiger_literal(f);
                                log_debug("boxNum = %u\n", boxNum);
@@ -964,9 +964,6 @@ void AigerReader::post_process()
                                RTLIL::Cell* cell = module->cell(stringf("$__box%d__", variable));
                                if (cell) { // ABC could have optimised this box away
                                        module->rename(cell, escaped_s);
-                                       RTLIL::Module* box_module = design->module(cell->type);
-                                       log_assert(box_module);
-
                                        for (const auto &i : cell->connections()) {
                                                RTLIL::IdString port_name = i.first;
                                                RTLIL::SigSpec rhs = i.second;