Define VEX128 and VEX256.
[binutils-gdb.git] / gas / ChangeLog
index f61097cfcea90ba407fb0c707b9052e47b145da1..1bc25c8bd7c64ac8e720b129e0aebcea47124115 100644 (file)
@@ -1,3 +1,157 @@
+2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (build_vex_prefix): Use VEX256.
+
+2009-12-14  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+       PR gas/11086
+       * config/tc-rx.c (rx_equ): Rename 'expr' to 'expression' in order
+       to avoid shadowing a global symbol of the same name.
+
+2009-12-14  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-microblaze.c (md_assemble): Rename 'imm' to 'immed' in
+       order to avoid shadowing a global symbol of the same name.
+
+2009-12-11  Andrew Jenner  <andrew@codesourcery.com>
+
+       * config/tc-arm.c (arm_init_frag): Set thumb MODE_RECORDED flag for
+       non-elf.
+       (arm_handle_align): Re-enable assert for non-elf.
+
+2009-12-11  Nick Clifton  <nickc@redhat.com>
+
+       * Makefile.in: Regenerate.
+       * doc/Makefile.in: Regenerate.
+       * configure: Regenerate.
+       * dw2gencfi.c: Fix shadowed variable warnings.
+       * dwarf2dbg.c: Likewise.
+       * expr.c: Likewise.
+       * hash.c: Likewise.
+       * listing.c: Likewise.
+       * macro.c: Likewise.
+       * read.c: Likewise.
+       * stabs.c: Likewise.
+       * symbols.c: Likewise.
+       * write.c: Likewise.
+       * config/bfin-parse.y: Likewise.
+       * config/obj-coff.c: Likewise.
+       * config/tc-arm.c: Likewise.
+       * config/tc-bfin.c: Likewise.
+       * config/tc-cr16.c: Likewise.
+       * config/tc-crx.c: Likewise.
+       * config/tc-d10v.c: Likewise.
+       * config/tc-d30v.c: Likewise.
+       * config/tc-frv.c: Likewise.
+       * config/tc-i370.c: Likewise.
+       * config/tc-i386-intel.c: Likewise.
+       * config/tc-i386.c: Likewise.
+       * config/tc-ia64.c: Likewise.
+       * config/tc-m32r.c: Likewise.
+       * config/tc-m68hc11.c: Likewise.
+       * config/tc-mips.c: Likewise.
+       * config/tc-mn10200.c: Likewise.
+       * config/tc-mn10300.c: Likewise.
+       * config/tc-ns32k.c: Likewise.
+       * config/tc-ppc.c: Likewise.
+       * config/tc-score.c: Likewise.
+       * config/tc-score7.c: Likewise.
+       * config/tc-sh.c: Likewise.
+       * config/tc-sh64.c: Likewise.
+       * config/tc-sparc.c: Likewise.
+       * config/tc-tic30.c: Likewise.
+       * config/tc-tic4x.c: Likewise.
+       * config/tc-tic54x.c: Likewise.
+       * config/tc-xtensa.c: Likewise.
+       * config/tc-z8k.c: Likewise.
+
+2009-12-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (arch_entry): Add len and skip.
+       (cpu_arch): Use STRING_COMMA_LEN.
+       (MESSAGE_TEMPLATE): New.
+       (show_arch): Likewise.
+       (md_show_usage): Use show_arch.
+
+2009-12-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/11037
+       * expr.c (resolve_expression): Call symbol_same_p to check
+       if 2 symbols are the same.
+
+       * symbols.c (symbol_same_p): New.
+       * symbols.h (symbol_same_p): Likewise.
+
+2009-12-02  Nick Clifton  <nickc@redhat.com>
+           Richard Earnshaw  <rearnsha@arm.com>
+
+       PR gas/11013
+       * config/tc-arm.c (do_t_simd2): New function.
+       (insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
+
+2009-11-30  Joseph Myers  <joseph@codesourcery.com>
+
+       * configure: Regenerate.
+
+2009-11-30  Nick Clifton  <nickc@redhat.com>
+
+       PR gas/11032
+       * config/tc-arm.c (relax_adr): Cope with a frag with no symbol.
+
+2009-11-19  Jan Beulich  <jbeulich@novell.com>
+
+       * read.c (pseudo_set): Also call copy_symbol_attributes() for
+       undefined target symbol.
+
+2009-11-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * config/tc-i386.c (cpu_arch): Remove cvt16.
+       (md_show_usage): Same.
+       * doc/c-i386.texi: Same.
+
+2009-11-18  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (arm_fpus): Add fpv4-sp-d16.
+       (aeabi_set_public_attributes): Correctly mark VFPv3xD.
+
+2009-11-18  Alan Modra  <amodra@bigpond.net.au>
+
+       * config/tc-ppc.c (md_assemble): Report error on invalid @tls operands
+       and opcode.
+
+2009-11-17  Sebastian Pop  <sebastian.pop@amd.com>
+           Quentin Neill  <quentin.neill@amd.com>
+
+       * config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
+       (build_vex_prefix): Handle xop08.
+       (md_assemble): Don't special case the constant 3 for insns using MODRM.
+       (build_modrm_byte): Handle vex2sources.
+       (md_show_usage): Add xop and cvt16.
+       * doc/c-i386.texi: Document fma4, xop, and cvt16.
+
+2009-11-17  Paul Brook  <paul@codesourcery.com>
+       Daniel Jacobowitz  <dan@codesourcery.com>
+
+       * doc/c-arm.texi: Document .arch armv7e-m.
+       * config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
+       (insns): Put Thumb versions of v5TExP instructions into
+       arm_ext_v5exp also.  Move some Thumb variants from
+       arm_ext_v6_notm to arm_ext_v6_dsp.
+       (arm_archs): Add armv7e-m architecture.
+       (aeabi_set_public_attributes): Handle -march=armv7e-m.
+
+2009-11-16  Viktor Kutuzov  <vkutuzov@accesssoftek.com>
+
+       * config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15.
+       (do_vmrs): New function.
+       (do_vmsr): New function.
+       (insns): Add vmrs and vmsr.
+
+2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (md_assemble): Check destination operand
+       for lockable instructions.
+
 2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (_i386_insn): Don't use bit field on