+2016-05-25 Chua Zheng Leong <chuazl@comp.nus.edu.sg>
+
+ PR target/20067
+ * config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64
+ instruction if supported by the currently selected fpu variant.
+ * testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR.
+ * testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly.
+
+2016-05-24 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Also return 0 for
+ jump relocations against MIPS16 or microMIPS symbols on RELA
+ targets.
+ * testsuite/gas/mips/jalx-local.d: New test.
+ * testsuite/gas/mips/jalx-local-n32.d: New test.
+ * testsuite/gas/mips/jalx-local-n64.d: New test.
+ * testsuite/gas/mips/jalx-local.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-05-24 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (md_apply_fix)
+ <BFD_RELOC_MIPS16_TLS_TPREL_LO16>: Remove fall-through, adjust
+ code accordingly.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-xtensa.c (struct suffix_reloc_map): Change type of field
+ operator to operatorT.
+ (map_suffix_reloc_to_operator): Change return type to operatorT.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-d30v.c (find_format): Change type of X_op to operatorT.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-mmix.c (mmix_parse_predefined_name): Change type of
+ handler_charp to const char *.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ft32.h (DEFAULT_TARGET_FORMAT): Remove.
+ (ft32_target_format): Likewise.
+ (TARGET_FORMAT): Adjust.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ia64.c (dot_rot): simplify allocations from obstacks.
+ (ia64_frob_label): Likewise.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-cr16.c (check_range): Make type of retval op_err.
+ * config/tc-crx.c: Likewise.
+
+2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (md_begin): Add XY registers.
+ (cpu_types): Code density is default off for ARC EM.
+
+2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
+
+ * config/tc-arc.c (attributes_t): Renamed attribute class to
+ attr_class.
+ (find_opcode_match, assemble_insn, tokenize_extinsn): Changed.
+
+2016-05-23 Kuba Sejdak <jakub.sejdak@phoesys.com>
+
+ * configuse.tgt: Add entry for arm-phoenix.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-tic54x.c (tic54x_sect): simplify string creation.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-spu.c (APUOP): Use OPCODE as an unsigned constant.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-tic54x.c (tic54x_mmregs): Adjust.
+ (md_begin): Likewise.
+ (encode_condition): Likewise.
+ (encode_cc3): Likewise.
+ (encode_cc2): Likewise.
+ (encode_operand): Likewise.
+ (tic54x_undefined_symbol): Likewise.
+
+2016-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Update comment. Add
+ p6600 entry.
+ * doc/c-mips.texi: Document p6600 -march option.
+
+2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19600
+ * config/tc-i386.c (md_apply_fix): Preserve addend for
+ BFD_RELOC_386_GOT32 and BFD_RELOC_X86_64_GOT32.
+ * testsuite/gas/i386/addend.d: New file.
+ * testsuite/gas/i386/addend.s: Likewise.
+ * testsuite/gas/i386/x86-64-addend.d: Likewise.
+ * testsuite/gas/i386/x86-64-addend.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run addend and x86-64-addend.
+ * testsuite/gas/i386/reloc32.d: Updated.
+
+2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (append_insn): Correct the encoding of a
+ constant argument for microMIPS JALX.
+ (tc_gen_reloc): Correct the encoding of an in-place addend for
+ microMIPS JALX.
+ * testsuite/gas/mips/jalx-addend.d: New test.
+ * testsuite/gas/mips/jalx-addend-n32.d: New test.
+ * testsuite/gas/mips/jalx-addend-n64.d: New test.
+ * testsuite/gas/mips/jalx-imm.d: New test.
+ * testsuite/gas/mips/jalx-imm-n32.d: New test.
+ * testsuite/gas/mips/jalx-imm-n64.d: New test.
+ * testsuite/gas/mips/jalx-addend.s: New test source.
+ * testsuite/gas/mips/jalx-imm.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c: Correct tab-after-space formatting mistakes
+ throughout.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (find_opcode_match): Remove casting away of
+ const.
+ * config/tc-arc.h (struct arc_flags): Make flgp field const.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (md_pcrel_from_section): Use BFD_VMA_FMT where
+ appropriate.
+ (md_convert_frag): Likewise.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_opcode_hash_entry_iterator_next): Set
+ cached opcode to NULL when we reach a non-matching opcode.
+ * testsuite/gas/arc/asm-errors-2.d: New file.
+ * testsuite/gas/arc/asm-errors-2.err: New file.
+ * testsuite/gas/arc/asm-errors-2.s: New file.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (tokenize_arguments): Add checks for array
+ overflow.
+ * testsuite/gas/arc/asm-errors.s: Addition test line added.
+ * testsuite/gas/arc/asm-errors.err: Update expected results.
+
+2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-rx.c (struct cpu_type): Change the type of a field from
+ int to enum rx_cpu_types.
+
+2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-dlx.c (struct machine_it): change the type of a field from
+ int to bfd_reloc_code_real_type.
+ * config/tc-tic4x.c: Likewise.
+
2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-v850.c (v850_target_arch): change type to enum